HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 84

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HD6413308

Manufacturer Part Number
HD6413308
Description
Hitachi Single-Chip MicroComputer
Manufacturer
Hitachi Semiconductor
Datasheet

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4.2.1 Interrupt-Related Registers
The interrupt controller refers to three registers in addition to the CCR. The names and attributes of
these registers are listed in Table 4-3.
Table 4-3. Registers Read by Interrupt Controller
Name
System control register
IRQ sense control register
IRQ enable register
(1) System Control Register (SYSCR)—H’FFC4
Bit
Initial value
Read/Write
The first four bits of the system control register concern the software standby mode, and the last
two bits enable the on-chip RAM and dual-port RAM. Bit 2 is the only bit read by the interrupt
controller.
Bit 2—Nonmaskable Interrupt Edge (NMIEG): This bit determines whether a nonmaskable
interrupt is generated on the falling or rising edge of the NMI input signal.
Bit 2
NMIEG
(2) IRQ Sense Control Register (ISCR)—H’FFC6
Bit
Initial value
Read/Write
0
1
Description
An interrupt is generated on the falling edge of NMI.
An interrupt is generated on the rising edge of NMI.
IRQ
SSBY
R/W
R/W
7
0
7
0
7
SC IRQ
STS2
R/W
R/W
6
0
6
0
6
SC IRQ
Abbreviation
SYSCR
ISCR
IER
STS1
R/W
R/W
5
0
5
0
5
SC IRQ
STS0
R/W
R/W
69
4
0
4
0
4
SC IRQ
Read/write
R/W
R/W
R/W
R/W
3
1
3
0
3
SC IRQ
NMIEG DPME
R/W
R/W
2
0
2
0
2
Address
H’FFC4
H’FFC6
H’FFC7
SC IRQ
(Initial state)
R/W
R/W
1
0
1
0
1
SC IRQ
RAME
R/W
R/W
0
1
0
0
0
SC

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