HD6413308 Hitachi Semiconductor, HD6413308 Datasheet - Page 263

• Manufacturer Part Number: HD6413308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: Hitachi Semiconductor

14.2 System Control Register: Power-Down Control Bits
Bits 7 to 4 of the system control register (SYSCR) concern the power-down state. Specifically,
they concern the software standby mode.
Table 14-2 lists the attributes of the system control register.
Table 14-2. System Control Register
Name
System control register
Bit
Initial value
Read/Write
Bit 7 – Software Standby (SSBY): This bit enables or disables the transition to the software
standby mode.
On recovery from the software standby mode by an external interrupt, SSBY remains set to "1." To
clear this bit, software must write a "0."
Bit 7
SSBY
Bits 6 to 4 – Standby Timer Select 2 to 0 (STS2 to STS0): These bits select the clock settling
time when the chip recovers from the software standby mode by an external interrupt. During the
selected time, the clock oscillator runs but clock pulses are not supplied to the CPU or the on-chip
supporting modules.
0
1
Description
The SLEEP instruction causes a transition to the sleep mode.
The SLEEP instruction causes a transition to the software
standby mode.
SSBY
R/W
7
0
STS2
R/W
Abbreviation
SYSCR
6
0
STS1
R/W
5
0
R/W
R/W
STS0
254
R/W
4
0
Initial value Address
H’09
—
—
3
1
NMIEG DPME
R/W
2
0
H’FFC4
R/W
1
0
(Initial value)
RAME
R/W
0
1