S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 202

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 3 Memory Mapping Control (S12XMMCV4)
The fixed 16K page from 0x4000–0x7FFF (when ROMHM = 0) is the page number 0xFD.
The reset value of 0xFE ensures that there is linear Flash space available between addresses 0x4000 and
0xFFFF out of reset.
The fixed 16K page from 0xC000-0xFFFF is the page number 0xFF.
3.3.2.7
Read: Anytime
Write: Anytime
These eight index bits are used to page 4 KByte blocks into the RAM page window located in the local
(CPU or BDM) memory map from address 0x1000 to address 0x1FFF (see
accessing up to 1022 KByte of RAM (in the Global map) within the 64 KByte Local map. The RAM page
index register is effectively used to construct paged RAM addresses in the Local map
202
Address: 0x0016
Reset
W
R
RP7
RAM Page Index Register (RPAGE)
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Because RAM page 0 has the same global address as the register space, it is
possible to write to registers through the RAM space when RPAGE = 0x00.
0
0
RP6
1
6
Figure 3-13. RAM Page Index Register (RPAGE)
0
MC9S12XE-Family Reference Manual Rev. 1.25
Figure 3-14. RPAGE Address Mapping
Bit19
Global Address [22:0]
RP5
1
5
Bit18
RPAGE Register [7:0]
CAUTION
RP4
NOTE
1
4
Bit12
Address: CPU Local Address
RP3
1
3
Bit11
or BDM Local Address
Address [11:0]
RP2
1
2
Figure
3-14). This supports
Bit0
Freescale Semiconductor
RP1
format.
0
1
RP0
1
0