S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 434

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 10 XGATE (S12XGATEV3)
LDW
Operation
M[RB, #OFFS5] ⇒ RD
M[RB, RI]
M[RB, RI]
RI-2
IMM16
Loads a 16 bit value into the register RD.
CCR Effects
Code and CPU Cycles
1. If the same general purpose register is used as index (RI) and destination register (RD), the content of the register will not be
434
N:
Z:
V:
C:
LDW RD, (RB, #OFFS5)
LDW RD, (RB, RI)
LDW RD, (RB, RI+)
LDW RD, (RB, -RI)
LDW RD, #IMM16
—
N
incremented after the data move: M[RB, RI] ⇒ RD
Not affected.
Not affected.
Not affected.
Not affected.
—
Z
—
V
Source Form
—
C
⇒ RD
⇒ RD;
⇒ RI;
⇒ RD (translates to LDL RD, #IMM16[7:0]; LDH RD, #IMM16[15:8])
RI+2
M[RS, RI] ⇒ RD
MC9S12XE-Family Reference Manual Rev. 1.25
Address
Mode
IMM8
IMM8
IDO5
IDR+
-IDR
IDR
Load Word from Memory
⇒ RI
0
0
0
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
1
Machine Code
RD
RD
RD
RD
RD
RD
RB
RB
RB
RB
IMM16[15:8]
IMM16[7:0]
RI
RI
RI
Freescale Semiconductor
OFFS5
LDW
0
0
1
0
1
0
Cycles
PR
PR
PR
PR
P
P