S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 393

• Manufacturer Part Number: S912XET256J2VAGR
• Description: 16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
• Manufacturer: Freescale Semiconductor

Specifications of S912XET256J2VAGR

• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Interface Type: CAN, SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

AND
Operation
RS1 & RS2
RD & IMM16 ⇒ RD (translates to ANDL RD, #IMM16[7:0]; ANDH RD, #IMM16[15:8])
Performs a bit wise logical AND of two 16 bit values and stores the result in the destination register RD.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
AND RD, RS1, RS2
AND RD, #IMM16
N
∆
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Refer to ANDH instruction for #IMM16 operations.
0; cleared.
Not affected.
Z
∆
V
0
Source Form
—
⇒ RD
When using immediate addressing mode (AND RD, #IMM16), the Z-flag
of the first instruction (ANDL RD, #IMM16[7:0]) is not considered by the
second instruction (ANDH RD, #IMM16[15:8]).
⇒ Don’t rely on the Z-Flag.
C
MC9S12XE-Family Reference Manual Rev. 1.25
Address
Mode
IMM8
IMM8
TRI
Logical AND
0
1
1
NOTE
0
0
0
0
0
0
1
0
0
0
0
1
Machine Code
RD
RD
RD
RS1
IMM16[15:8]
IMM16[7:0]
Chapter 10 XGATE (S12XGATEV3)
RS2
AND
0
0
Cycles
P
P
P
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