S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 419
S912XET256J2VAGR
Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEQ512J3CAGR.pdf
(1324 pages)
Specifications of S912XET256J2VAGR
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
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BRK
Operation
Put XGATE into Debug Mode (see
breakpoint to the S12X_DBG module (see section 4.9 of the S12X_DBG Section).
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
BRK
—
N
Not affected.
Not affected.
Not affected.
Not affected.
—
Z
—
V
Source Form
—
It is not possible to single step over a BRK instruction. This instruction does
not advance the program counter.
C
MC9S12XE-Family Reference Manual Rev. 1.25
Address
Section 10.6.1.0.1, “Entering Debug
Mode
INH
0
Break
NOTE
0
0
0
0
0
Machine Code
0
0
0
Mode”) and signals a software
0
0
Chapter 10 XGATE (S12XGATEV3)
0
0
0
BRK
0
0
Cycles
PAff
419
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