S912XET256J2VAGR Freescale Semiconductor, S912XET256J2VAGR Datasheet - Page 580
S912XET256J2VAGR
Manufacturer Part Number
S912XET256J2VAGR
Description
16-bit Microcontrollers - MCU Watchdog OSC/Timer -40 C to + 105 C HCS12X MCU SPI
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEQ512J3CAGR.pdf
(1324 pages)
Specifications of S912XET256J2VAGR
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
256 KB
Data Ram Size
16 KB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
24
Interface Type
CAN, SCI, SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V
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Chapter 15 Inter-Integrated Circuit (IICV3) Block Description
15.1.2
The IIC functions the same in normal, special, and emulation modes. It has two low power modes: wait
and stop modes.
15.1.3
The block diagram of the IIC module is shown in
15.2
The IICV3 module has two external pins.
15.2.1
This is the bidirectional serial clock line (SCL) of the module, compatible to the IIC bus specification.
15.2.2
This is the bidirectional serial data line (SDA) of the module, compatible to the IIC bus specification.
580
•
•
General Call Address detection
Compliant to ten-bit address
External Signal Description
Modes of Operation
Block Diagram
IIC_SCL — Serial Clock Line Pin
IIC_SDA — Serial Data Line Pin
Interrupt
bus_clock
IIC
MC9S12XE-Family Reference Manual Rev. 1.25
Registers
Figure 15-1. IIC Block Diagram
Clock
Control
Figure
Start
Stop
Arbitration
Control
Compare
Address
15-1.
In/Out
Data
Shift
Register
Freescale Semiconductor
SCL
SDA
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