MC68332GCEH20 Freescale Semiconductor, MC68332GCEH20 Datasheet - Page 14

• Manufacturer Part Number: MC68332GCEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure
6-3
6-4
6-5
6-5
6-5
6-6
6-6
6-7
6-8
7-1
7-2
7-3
A-1
A-2
A-3
A-4
A-5
A-6
A-7
A-8
A-9
A-10
A-11
A-12
A-13
A-14
A-15
A-16
A-17
A-18
A-19
A-20
B-1
B-2
D-1
D-2
QSPI RAM ...................................................................................................... 6-8
Flowchart of QSPI Initialization Operation .................................................... 6-11
Flowchart of QSPI Master Operation (Part 1) .............................................. 6-12
Flowchart of QSPI Master Operation (Part 2) .............................................. 6-13
Flowchart of QSPI Master Operation (Part 3) .............................................. 6-14
Flowchart of QSPI Slave Operation (Part 1) ................................................ 6-15
Flowchart of QSPI Slave Operation (Part 2) ................................................ 6-16
SCI Transmitter Block Diagram .................................................................... 6-23
SCI Receiver Block Diagram ........................................................................ 6-24
TPU Block Diagram ........................................................................................ 7-1
TCR1 Prescaler Control ............................................................................... 7-12
TCR2 Prescaler Control ............................................................................... 7-13
CLKOUT Output Timing Diagram ................................................................. A-14
External Clock Input Timing Diagram ........................................................... A-14
ECLK Output Timing Diagram ...................................................................... A-14
Read Cycle Timing Diagram ........................................................................ A-15
Write Cycle Timing Diagram ......................................................................... A-16
Fast Termination Read Cycle Timing Diagram ............................................ A-17
Fast Termination Write Cycle Timing Diagram ............................................. A-18
Bus Arbitration Timing Diagram —Active Bus Case .................................... A-19
Bus Arbitration Timing Diagram — Idle Bus Case ....................................... A-20
Show Cycle Timing Diagram ........................................................................ A-20
Chip Select Timing Diagram ......................................................................... A-21
Reset and Mode Select Timing Diagram ...................................................... A-21
Background Debugging Mode Timing Diagram — Serial Communication ... A-23
Background Debugging Mode Timing Diagram — Freeze Assertion ........... A-23
ECLK Timing Diagram .................................................................................. A-25
QSPI Timing — Master, CPHA = 0 .............................................................. A-27
QSPI Timing — Master, CPHA = 1 .............................................................. A-27
QSPI Timing — Slave, CPHA = 0 ................................................................ A-28
QSPI Timing — Slave, CPHA = 1 ................................................................ A-28
TPU Timing Diagram .................................................................................... A-29
132-Pin Plastic Surface Mount Package Pin Assignments ............................ B-2
144-Pin Plastic Surface Mount Package Pin Assignments ............................ B-3
User Programming Model ..............................................................................D-2
Supervisor Programming Model Supplement .................................................D-2
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MC68332
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