MC68332GCEH20 Freescale Semiconductor, MC68332GCEH20 Datasheet - Page 226

• Manufacturer Part Number: MC68332GCEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

D.2.18 TSTSC — Test Module Shift Count
D.2.19 TSTRC — Test Module Repetition Count
D.2.20 CREG — Test Submodule Control Register
D.2.21 DREG — Distributed Register
D.2.22 PORTC — Port C Data Register
D.2.23 CSPAR0 — Chip Select Pin Assignment Register 0
D-12
15
15
0
0
Register is used for factory test only.
Register is used for factory test only.
Register is used for factory test only.
Register is used for factory test only.
PORTC latches data for chip-select pins that are used for discrete output.
Contains seven 2-bit fields, CSPA0[6:1] and CSBOOT, that determine the functions of
corresponding chip-select pins. CSPAR0[15:14] are not used. These bits always read
zero; write has no effect. CSPAR0 bit 1 always reads one; writes to CSPAR0 bit 1 have
no effect. The alternate functions can be enabled by data bus mode selection during
reset.
RESET:
RESET:
CSPAR0 Field
14
0
0
CSPA0[6]
CSPA0[5]
CSPA0[4]
CSPA0[3]
CSPA0[2]
CSPA0[1]
CSBOOT
DATA2
13
CSPA0[6]
NOT USED
12
1
Freescale Semiconductor, Inc.
DATA2
11
For More Information On This Product,
CSPA0[5]
10
1
CSPAR0 Signal
Go to: www.freescale.com
CSPAR0 Pin Assignments
CSBOOT
REGISTER SUMMARY
DATA2
CS5
CS4
CS3
CS2
CS1
CS0
9
CSPA0[4]
8
8
1
DATA1
7
0
0
7
CSPA0[3]
Alternate Signal
PC6
6
1
6
1
BGACK
FC2
FC1
FC0
DATA1
BG
BR
—
PC5
5
1
5
CSPA0[2]
PC4
4
1
4
1
DATA1
PC3
3
1
3
CSPA0[1]
Discrete Output
USER’S MANUAL
PC2
2
1
2
1
PC2
PC1
PC0
—
—
—
—
$YFFA3A
$YFFA34
$YFFA36
$YFFA38
$YFFA41
$YFFA44
PC1
1
1
1
1
MC68332
CSBOOT
DATA0
PC0
0
1
0