MC68332GCEH20 Freescale Semiconductor, MC68332GCEH20 Datasheet - Page 215

• Manufacturer Part Number: MC68332GCEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

D.1 Central Processing Unit
MC68332
USER’S MANUAL
This appendix contains MCU address maps, register diagrams, and bit/field defini-
tions. More detailed information about register function is provided in the appropriate
sections of the manual.
Except for central processing unit resources, information is presented in the intermod-
ule bus address order shown in Table D-1.
Control registers for all the modules in the microcontroller are mapped into a 4-Kbyte
block. The state of the module mapping (MM) bit in the SIM configuration register
(SIMCR) determines where the control registers block is located in the system mem-
ory map. When MM = 0, register addresses range from $7FF000 to $7FFFFF; when
MM = 1, register addresses range from $FFF000 to $FFFFFF.
In the module memory maps in this appendix, the “Access” column specifies which
registers are accessible at the supervisor privilege level only and which registers can
be assigned to either the supervisor or user privilege level.
CPU32 registers are not part of the module address map. The following diagram is a
functional representation of CPU resources.
TPURAM CNTL
APPENDIX D REGISTER SUMMARY
Freescale Semiconductor, Inc.
Module
QSM
For More Information On This Product,
TPU
SIM
Table D-1 Module Address Map
Go to: www.freescale.com
REGISTER SUMMARY
(Bytes)
Size
128
512
512
64
$YFFA00
$YFFB00
$YFFC00
$YFFE00
Address
Base
D-1