MC68332GCEH20 Freescale Semiconductor, MC68332GCEH20 Datasheet - Page 246

• Manufacturer Part Number: MC68332GCEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PSCK — Prescaler Clock
IARB — Interrupt Arbitration
D.5.2 TCR — Test Configuration Register
D.5.3 DSCR — Development Support Control Register
HOT4 — Hang on T4
BLC — Branch Latch Control
CLKS — Stop Clocks (to TCRs)
FRZ[1:0] — IMB FREEZE Response
CCL — Channel Conditions Latch
D-32
HOT4
15
0
Each module that generates interrupts must have an IARB value. IARB values are
used to arbitrate between interrupt requests of the same priority.
The TCR is used for factory test of the MCU.
The FRZ bits specify the TPU microengine response to the FREEZE signal.
CCL controls the latching of channel conditions (MRL and TDL) when the CHAN reg-
ister is written.
RESET:
0 = System clock/32 is input to TCR1 prescaler
1 = System clock/4 is input to TCR1 prescaler
0 = Exit wait on T4 state caused by assertion of HOT4
1 = Enter wait on T4 state
0 = Latch conditions into branch condition register before exiting halted state.
1 = Do not latch conditions into branch condition register before exiting the halted
0 = Do not stop TCRs.
1 = Stop TCRs during the halted state.
0 = Only the pin state condition of the new channel is latched as a result of the write
1 = Pin state, MRL, and TDL conditions of the new channel are latched as a result
14
0
0
state or during the time-slot transition period.
CHAN register microinstruction.
of a write CHAN register microinstruction.
13
0
0
12
0
0
FRZ[1:0]
Freescale Semiconductor, Inc.
00
01
10
11
11
For More Information On This Product,
0
0
BLC
10
0
Go to: www.freescale.com
REGISTER SUMMARY
CLKS
9
0
Ignore Freeze
Reserved
Freeze at End of Current Microcycle
Freeze at Next Time-Slot Boundary
FRZ1
8
0
FRZ0
7
0
TPU Response
CCL
6
0
BP
5
0
BC
4
0
BH
3
0
USER’S MANUAL
BL
2
0
$YFFE02
$YFFE04
BM
1
0
MC68332
BT
0
0