MC68332GCEH20 Freescale Semiconductor, MC68332GCEH20 Datasheet - Page 148

• Manufacturer Part Number: MC68332GCEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

6.4.3.2 Serial Formats
6.4.3.3 Baud Clock
6-26
All data frames must have a start bit and at least one stop bit. Receiving and transmit-
ting devices must use the same data frame format. The SCI provides hardware sup-
port for both ten-bit and eleven-bit frames. The serial mode (M) bit in SCI control
register one (SCCR1) specifies the number of bits per frame.
The most common ten-bit data frame format for NRZ serial interface consists of one
start bit, eight data bits (LSB first), and one stop bit. The most common eleven-bit data
frame contains one start bit, eight data bits, a parity or control bit, and one stop bit.
Ten-bit and eleven-bit frames are shown in Table 6-5.
The SCI baud clock is programmed by writing a 13-bit value to the baud rate (SCBR)
field in SCI control register zero (SCCR0). Baud clock is derived from the MCU system
clock by a modulus counter. Writing a value of zero to SCBR disables the baud rate
generator. Baud clock rate is calculated as follows:
where SCBR is in the range {1, 2, 3,..., 8191}.
The SCI receiver operates asynchronously. An internal clock is necessary to synchro-
nize with an incoming data stream. The SCI baud clock generator produces a receive
• Start Bit — One bit-time of logic zero that indicates the beginning of a data frame.
• Stop Bit — One bit-time of logic one that indicates the end of a data frame.
• Frame — A complete unit of serial information. The SCI can use 10-bit or 11-bit
• Data Frame — A start bit, a specified number of data or information bits, and at
• Idle Frame — A frame that consists of consecutive ones. An idle frame has no
• Break Frame — A frame that consists of consecutive zeros. A break frame has
A start bit must begin with a one-to-zero transition and be preceded by at least
three receive time (RT) samples of logic one.
frames.
least one stop bit.
start bit.
no stop bits.
Start
Start
Freescale Semiconductor, Inc.
1
1
1
1
1
For More Information On This Product,
Table 6-5 Serial Frame Formats
SCI Baud Clock Rate
QUEUED SERIAL MODULE
Go to: www.freescale.com
Data
Data
7
7
8
7
8
10-Bit Frames
11-Bit Frames
Parity/Control
Parity/Control
—
—
1
1
1
=
System Clock
----------------------------------- -
32 SCBR
Stop
Stop
2
1
1
2
1
USER’S MANUAL
MC68332