MC68332GCEH20 Freescale Semiconductor, MC68332GCEH20 Datasheet - Page 220

• Manufacturer Part Number: MC68332GCEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GCEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

SUPV — Supervisor/Unrestricted Data Space
MM — Module Mapping
IARB[3:0] — Interrupt Arbitration Field
D.2.2 SIMTR — System Integration Test Register
D.2.3 SYNCR — Clock Synthesizer Control Register
W — Frequency Control (VCO)
X — Frequency Control Bit (Prescale)
Y[5:0] — Frequency Control (Counter)
EDIV — ECLK Divide Rate
SLIMP — Limp Mode
SLOCK — Synthesizer Lock
D-6
15
W
0
The SUPV bit places the SIM global registers in either supervisor or user data space.
Determines SIM interrupt arbitration priority. The reset value is $F (highest priority), to
prevent SIM interrupts from being discarded during initialization.
SIMTR is used for factory test only.
SYNCR determines system clock operating frequency and mode of operation. Clock
frequency is determined by SYNCR bit settings as follows:
The Y field is the initial value for the modulus 64 down counter in the synthesizer feed-
back loop. Values range from 0 to 63.
RESET:
0 = Registers with access controlled by the SUPV bit are accessible from either the
1 = Registers with access controlled by the SUPV bit are restricted to supervisor
0 = Internal modules are addressed from $7FF000 – $7FFFFF.
1 = Internal modules are addressed from $FFF000 – $FFFFFF.
0 = Base VCO frequency
1 = VCO frequency multiplied by four
0 = VCO frequency divided by four (base system clock frequency)
1 = VCO frequency divided by two (system clock frequency doubles)
0 = ECLK is system clock divided by 8
1 = ECLK is system clock divided by 16
0 = External crystal is VCO reference
1 = Loss of crystal reference
0 = VCO is enabled, but has not locked.
1 = VCO has locked on the desired frequency or system clock is external.
14
X
0
user or supervisor privilege level.
access only.
13
1
1
Freescale Semiconductor, Inc.
For More Information On This Product,
1
Y
1
Go to: www.freescale.com
REGISTER SUMMARY
1
8
1
EDIV
7
0
6
0
0
5
0
0
SLIMP SLOCK RSTEN STSIM STEXT
U
4
U
3
USER’S MANUAL
2
0
$YFFA02
$YFFA04
1
0
MC68332
0
0