PIC16LF723A-I/ML Microchip Technology, PIC16LF723A-I/ML Datasheet - Page 19

MCU PIC 3.5K FLASH XLP 28-QFN

PIC16LF723A-I/ML

Manufacturer Part Number
PIC16LF723A-I/ML
Description
MCU PIC 3.5K FLASH XLP 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF723A-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16LF
No. Of I/o's
25
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
TABLE 2-1:
 2010 Microchip Technology Inc.
00h
01h
02h
03h
04h
05h
06h
07h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Address
Bank 0
(2)
(2)
(2)
(2)
(1, 2)
(2)
1:
2:
3:
4:
5:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRES
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are
transferred to the upper byte of the program counter.
These registers can be addressed from any bank.
Accessible only when SSPM<3:0> = 1001.
Accessible only when SSPM<3:0>  1001.
This bit is always ‘1’ as RE3 is input only.
Name
PIC16F/LF722A/723A SPECIAL FUNCTION REGISTER SUMMARY
Synchronous Serial Port Receive Buffer/Transmit Register
USART Receive Data Register
A/D Result Register
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Capture/Compare/PWM Register (LSB)
Capture/Compare/PWM Register (MSB)
USART Transmit Data Register
Capture/Compare/PWM Register 2 (LSB)
Capture/Compare/PWM Register 2 (MSB)
TMR1CS1 TMR1CS0 T1CKPS1
TMR1GIF
WCOL
SPEN
Bit 7
RA7
RB7
RC7
IRP
GIE
TOUTPS3 TOUTPS2 TOUTPS1
SSPOV
PEIE
ADIF
Bit 6
RP1
RA6
RB6
RC6
RX9
SSPEN
DC1B1
DC2B1
SREN
CHS3
RCIF
Bit 5
T0IE
RP0
RA5
RB5
RC5
Write Buffer for the upper 5 bits of the Program Counter
T1CKPS0
DC1B0
DC2B0
CREN
CHS2
Bit 4
INTE
TXIF
RA4
RB4
RC4
CKP
TO
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
SSPM3
ADDEN
PIC16F/LF722A/723A
SSPIF
CHS1
RBIE
Bit 3
RC3
RA3
RB3
RE3
PD
TMR2ON
CCP1M2
CCP2M2
T1SYNC
CCP1IF
SSPM2
FERR
CHS0
Bit 2
RC2
T0IF
RA2
RB2
Z
GO/DONE
T2CKPS1 T2CKPS0 -000 0000
CCP1M1
CCP2M1
TMR2IF
SSPM1
OERR
INTF
Bit 1
RA1
RB1
RC1
DC
TMR1ON
CCP1M0
CCP2M0
TMR1IF
CCP2IF
SSPM0
ADON
RX9D
RBIF
Bit 0
RA0
RB0
RC0
C
DS41417A-page 19
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- xxxx
---0 0000
0000 000x
0000 0000
---- ---0
xxxx xxxx
xxxx xxxx
0000 00-0
0000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
--00 0000
POR, BOR
Value on:
108,34
108,34
112,34
115,34
116,34
157,34
174,34
125,34
125,34
124,34
143,34
142,34
140,34
125,34
125,34
124,34
26,34
99,34
25,34
22,34
26,34
48,34
57,34
67,34
74,34
25,34
40,34
43,34
44,34
93,34
92,34
Page

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