PIC16LF723A-I/ML Microchip Technology, PIC16LF723A-I/ML Datasheet - Page 32

• Manufacturer Part Number: PIC16LF723A-I/ML
• Description: MCU PIC 3.5K FLASH XLP 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF723A-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 25
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16LF
• No. Of I/o's: 25
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F/LF722A/723A
3.6
On power-up, the time-out sequence is as follows: first,
PWRT time-out is invoked after POR has expired, then
OST is activated after the PWRT time-out has expired.
The total time-out will vary based on oscillator configu-
ration and PWRTE bit status. For example, in EC mode
with PWRTE bit = 1 (PWRT disabled), there will be no
time-out at all. Figure 3-4, Figure 3-5 and Figure 3-6
depict time-out sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then,
bringing MCLR high will begin execution immediately
(see Figure 3-5). This is useful for testing purposes or
to synchronize more than one PIC16F/LF722A/723A
device operating in parallel.
Table 3-3 shows the Reset conditions for some special
registers.
TABLE 3-2:
TABLE 3-3:
DS41417A-page 32
XT, HS, LP
RC, EC, INTOSC
Note 1:
Legend: u = unchanged, x = unknown
Oscillator Configuration
POR
0
1
u
u
u
u
Time-out Sequence
LP mode with T1OSC disabled.
(1)
BOR
u
0
u
u
u
u
TIME-OUT IN VARIOUS SITUATIONS
RESET BITS AND THEIR SIGNIFICANCE
TO
1
1
0
0
u
1
T
PWRT
PWRTE = 0
T
T
PWRT
PD
OSC
1
1
u
0
u
0
+ 1024 •
Power-up
Power-on Reset
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep
1024 • T
PWRTE = 1
—
OSC
indicating that a brown-out has occurred. The BOR
Status bit is a “don’t care” and is not necessarily
predictable if the brown-out circuit is disabled
3.7
The Power Control (PCON) register has two Status bits
to indicate what type of Reset that last occurred.
Bit 0 is BOR (Brown-out Reset). BOR is unknown on
Power-on Reset. It must then be set by the user and
checked on subsequent Resets to see if BOR = 0,
(BOREN<1:0> = 00 in the Configuration Word register).
Bit 1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent Reset, if POR is ‘0’, it will indicate that a
Power-on Reset has occurred (i.e., V
gone too low).
For more information, see Section 3.5 “Brown-Out
Reset (BOR)”.
T
PWRT
PWRTE = 0
T
T
PWRT
Power Control (PCON) Register
OSC
+ 1024 •
Brown-out Reset
Condition
PWRTE = 1
1024 • T
 2010 Microchip Technology Inc.
—
OSC
Wake-up from
1024 • T
DD
Sleep
may have
—
OSC