PIC16LF723A-I/ML Microchip Technology, PIC16LF723A-I/ML Datasheet - Page 193

MCU PIC 3.5K FLASH XLP 28-QFN

PIC16LF723A-I/ML

Manufacturer Part Number
PIC16LF723A-I/ML
Description
MCU PIC 3.5K FLASH XLP 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF723A-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16LF
No. Of I/o's
25
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2010 Microchip Technology Inc.
Subtract W from f
[ label ] SUBWF f,d
0 f 127
d  [0,1]
(f) - (W) destination)
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f.
C = 0
C = 1
DC = 0
DC = 1
(f<3:0>)  (destination<7:4>),
The upper and lower nibbles of
Swap Nibbles in f
[ label ] SWAPF f,d
0  f  127
d  [0,1]
(f<7:4>)  (destination<3:0>)
None
register ‘f’ are exchanged. If ‘d’ is
‘0’, the result is placed in the W
register. If ‘d’ is ‘1’, the result is
placed in register ‘f’.
W  f
W  f
W<3:0>  f<3:0>
W<3:0>  f<3:0>
PIC16F/LF722A/723A
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] XORWF
0  f  127
d  [0,1]
(W) .XOR. (f) destination)
Z
Exclusive OR the contents of the
W register with register ‘f’. If ‘d’ is
‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Exclusive OR W with f
Exclusive OR literal with W
[ label ] XORLW k
0 k 255
(W) .XOR. k W)
Z
The contents of the W register
are XOR’ed with the eight-bit
literal ‘k’. The result is placed in
the W register.
DS41417A-page 193
f,d

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