ST7FLITE35F2M6 STMicroelectronics, ST7FLITE35F2M6 Datasheet - Page 176

IC MCU 8BIT 8K FLASH 20SOIC

ST7FLITE35F2M6

Manufacturer Part Number
ST7FLITE35F2M6
Description
IC MCU 8BIT 8K FLASH 20SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheets

Specifications of ST7FLITE35F2M6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
LINSCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5085 - EVAL BOARD UNIV MOTOR CONTROL497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Quantity
Price
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Function Descriptions
Table 120. LART_ConfigureOCMP
Note: Take care of the ATR value while using this function.
176/235
Function Name
Function Prototype
Behaviour Description
Input Parameter 1
Input Parameter 2
Output Parameters
Required Preconditions
Functions called
Postconditions
See also
1) Feature available only for ST7FLite1, ST7FLite2, ST7FLite3 and ST7DALI devices
LART_ConfigureOCMP
Void LART_ConfigureOCMP( Lart_OCMPChannel OCM-
PChannel, unsigned int Dutycycle_Data)
Puts timer in Output Compare mode. This mode disables
PWM output.
OCMPChannel
LART_OCMP0
OCMP0 is configured
LART_OCMP1
OCMP1 is configured
LART_OCMP2
OCMP2 is configured
LART_OCMP3
OCMP3 is configured
Dutycycle_Data
Data to be loaded in Duty cycle register (0x000 to 0xFFF)
which will be compared with upcounter.
None
LART_Init must have been called to select the counter
clock.
None
When the upcounter value reaches the Dutycycle_Data,
the CMPFxflag is set and an interrupt is generated if com-
pare interrupt is enabled.
LART_Init, LART_OCMP_Mode
1)
1)
1)

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