R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 216

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Table 14.25
i = 0 or 1, j = either A, B, C, or D
Count sources
Count operations
Count period
Waveform output timing
Count start condition
Count stop conditions
Interrupt request generation
timing
TRDIOA0 pin function
TRDIOB0, TRDIOC0, TRDIOD0,
TRDIOA1 to TRDIOD1 pin
functions
INT0 pin function
Read from timer
Write to timer
Select functions
Feb 29, 2008
Item
Output Compare Function Specifications
Page 197 of 485
f1, f2, f4, f8, f32, fOCO40M
External signal input to the TRDCLK pin (valid edge selected by a program)
Increment
• When bits CCLR2 to CCLR0 in the TRDCRi register are set to 000b (free-
• Bits CCLR1 to CCLR0 in the TRDCRi register are set to 01b or 10b (set the
Compare match
1 (count starts) is written to the TSTARTi bit in the TRDSTR register.
• 0 (count stops) is written to the TSTARTi bit in the TRDSTR register when the
• When the CSELi bit in the TRDSTR register is set to 0, the count stops at the
• Compare match (content of the TRDi register matches content of the TRDGRji
• TRDi register overflows
Programmable I/O port, output-compare output, or TRDCLK (external clock) input
Programmable I/O port or output-compare output (Selectable by pin)
Programmable I/O port, pulse output forced cutoff signal input, or INT0 interrupt
input
The count value can be read by reading the TRDi register.
• When the SYNC bit in the TRDMR register is set to 0 (channels 0 and 1 operate
• When the SYNC bit in the TRDMR register is set to 1 (channels 0 and 1 operate
• Output-compare output pin selected
• Output level at the compare match selected
• Initial output level selected
• Timing to set the TRDi register to 0000h
• Buffer operation (Refer to 14.3.2 Buffer Operation.)
• Synchronous operation (Refer to 14.3.3 Synchronous Operation.)
• Output pin in registers TRDGRCi and TRDGRDi changed
• Pulse output forced cutoff signal input (Refer to 14.3.4 Pulse Output Forced
• Timer RD can be used as the internal timer without output.
running operation)
TRDi register to 0000h at the compare match in the TRDGRji register).
CSELi bit in the TRDSTR register is set to 1.
compare match in the TRDGRAi register.
register.)
independently).
synchronously).
Cutoff.)
1/fk × 65536 fk: Frequency of count source
Frequency of count source x (n+1)
n: Setting value in the TRDGRji register
The output compare output pin holds output level before the count stops.
The output compare output pin holds level after output change by the compare
match.
Data can be written to the TRDi register.
Data can be written to both the TRD0 and TRD1 registers by writing to the TRDi
register.
Either 1 pin or multiple pins among TRDIOAi, TRDIOBi, TRDIOCi, or TRDIODi.
“L” output, “H” output, or output level inversed
Set the level at period from the count start to the compare match.
Overflow or compare match in the TRDGRAi register
The TRDGRCi register can be used as output control of the TRDIOAi pin and
the TRDGRDi register can be used as output control of the TRDIOBi pin.
Specification
14. Timers