R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 507

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
0.20
REVISION HISTORY
Jan 16, 2006
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10.5.1.2 Low-Speed Clock Mode;
10.5.1.4 Low-Speed On-Chip Oscillator Mode;
Figure 10.11 Handling Procedure of Internal Power Low Consumption
Enabled by VCA20 bit added
Figure 10.12 State Transition in Power Control Mode revised
10.6.1 How to Use Oscillation Stop Detection Function;
10.7.1 Stop Mode and 10.7.2 Wait Mode → 10.7.1 Stop Mode and Wait
Mode revised
10.7.3 Oscillation Stop Detection Function;
10.7.4 fOCO40M added
Figure 12.11 Interrupt Priority Level Judgement Circuit; NOTE2 deleted
Figure 12.18 Registers AIER and RMAD0 to RMAD1;
12.6.7 Entering Wait Mode after Oscillation Stop Detection Interrupt is
Detected added
Figure 13.2 Registers OFS and WDC; OFS register NOTE1 revised and
NOTE3 added, and WDC register NOTE1 deleted
Table 14.1 Functional Comparison of Timers;
Figure 14.1 Block Diagram of Timer RA revised
Table 14.3 Pulse Output Mode Specifications revised
Table 14.6 Pulse Period Measurement Mode Specifications revised
Figure 14.11 Operating Example of Pulse Period Measurement Mode revised
Figure 14.12 Block Diagram of Timer RB revised
Figure 14.13 Registers TRBCR and TRBOCR; TRBOCR register revised
Figure 14.15 Registers TRBPRE, TRBSC, and TRBPR;
Figure 14.20 TRBIOC Register in Programmable One-Shot Generation
Mode
Figure 14.23 Registers TRBIOC and TRBMR in Programmable One-
Shot Generation Mode; TRBIOC register NOTE2 revised
Figure 14.25 Registers TRBIOC and TRBMR in Programmable Wait
One-Shot Generation Mode; TRBIOC register NOTE2 revised
-Output compare function;
R8C/24 Group, R8C/25 Group Hardware Manual
“In this mode, stopping the XIN clock ... the VCA20 bit.” added
“In this mode, stopping the XIN clock ... the VCA20 bit.” added
“ • This function cannot be... is 2 MHz or below. ...” →
“ • This function cannot be... is below 2 MHz. ...” revised
“Since ... is 2 MHz or below, ...” → “Since ... is below 2 MHz. ...” revised
“To use this MCU with supply voltage ... to the chip externally.” added
AIER and RMAD0 to RMAD1 register revised
Input Pin: Timer RD “TRDCLK” added
TRBPR register revised
“(Pin output can be changed at detection)” added
C - 3
Description
Summary