R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 285

IC R8C/25 MCU FLASH 52LQFP

R5F21257SNFP#U0

Manufacturer Part Number
R5F21257SNFP#U0
Description
IC R8C/25 MCU FLASH 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets

Specifications of R5F21257SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21257SNFP#U0R5F21257SNFP
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Company:
Part Number:
R5F21257SNFP#U0
Manufacturer:
AD
Quantity:
101
Company:
Part Number:
R5F21257SNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
R5F21257SNFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R5F21257SNFP#U0R5F21257SNFP#V2
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.109 Operation at Compare Match between Registers TRD0 and TRDGRA0 in
TRDGRB0 register
TRDGRA1 register
TRDGRB1 register
TRDSR0 register
Count value in TRD0
IMFA bit in
Setting value in
• If the value in the TRDGRA0 register is assumed to be m, the TRD0 register counts m-1, m, m+1, m, m-1,
Feb 29, 2008
in that order, when changing from increment to decrement operation.
When changing from m to m+1, the IMFA bit is set to 1. Also, bits CMD1 to CMD0 in the TRDFCR
register are set to 11b (complementary PWM mode, buffer data transferred at compare match between
registers TRD0 and TRDGRA0), the content in the buffer registers (TRDGRD0, TRDGRC1, and
TRDGRD1) is transferred to the general registers (TRDGRB0, TRDGRA1, and TRDGRB1).
During m+1, m, and m-1 operation, the IMFA bit remains unchanged and data are not transferred to
registers such as the TRDGRA0 register.
register m
TRDGRA0
Complementary PWM Mode
register
1
0
Set to 0 by a program
Page 266 of 485
Transferred from
buffer register
m+1
No change
Not transferred from buffer register
When bits CMD1 to CMD0 in the
TRDFCR register are set to 11b
(transfer from the buffer register to the
general register at compare match of
between registers TRD0 and
TRDGRA0).
14. Timers

Related parts for R5F21257SNFP#U0