R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 94

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 10.2
System Clock Control Register 0
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Set the PRC0 bit in the PRCR register to 1 (w rite enable) before rew riting the CM0 register.
The CM05 bit stops the XIN clock w hen the high-speed on-chip oscillator mode, low -speed on-chip oscillator mode is
selected. Do not use this bit to detect w hether the XIN clock is stopped. To stop the XIN clock, set the bits in the
follow ing order:
(a) Set bits OCD1 to OCD0 in the OCD register to 00b.
(b) Set the OCD2 bit to 1 (selects on-chip oscillator clock).
During external clock input, only the clock oscillation buffer is turned off and clock input is acknow ledged.
When the CM05 bit is set to 1 (XIN clock stopped) and the CM13 bit in the CM1 register is set to 0 (P4_6, P4_7), P4_6
and P4_7 can be used as input ports.
When entering stop mode, the CM06 bit is set to 1 (divide-by-8 mode).
The CM04 bit can be set to 1 by a program but cannot be set to 0.
To use the XCIN clock, set the CM04 bit to 1. Also, set ports P4_3 and P4_4 as input ports w ithout pull-up.
Set the CM07 bit to 1 from 0 (XCIN clock) after setting the CM04 bit to 1 (XCIN-XCOUT pin) and allow ing XCIN clock
oscillation to stabilize.
The MCU enters stop mode, the CM03 bit is set to 1 (high). Rew rite the CM03 bit w hile the XCIN clock oscillation
stabilizes.
Feb 29, 2008
CM0 Register
0 0
Bit Symbol
(b1-b0)
Symbol
CM02
CM03
CM04
CM05
CM06
CM07
CM0
Page 75 of 485
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Reserved bits
WAIT peripheral function clock
stop bit
XCIN-XCOUT drive capacity
select bit
Port, XCIN-XCOUT sw itch bit
XIN clock (XIN-XOUT)
stop bit
System clock division select bit
0
CPU clock select bit
(5)
(1)
(2, 4)
(9)
Address
Bit Name
0006h
(8)
(6)
Set to 0.
0 : Peripheral function clock does not stop
1 : Peripheral function clock stops in w ait
0 : Low
1 : High
0 : I/O port P4_3, P4_4
1 : XCIN-XCOUT pin
0 : XIN clock oscillates
1 : XIN clock stops
0 : CM16, CM17 enabled
1 : Divide-by-8 mode
0 : System clock
1 : XCIN clock
in w ait mode
mode
After Reset
01101000b
(3)
Function
(7)
10. Clock Generation Circuit
RW
RW
RW
RW
RW
RW
RW
RW