R5F21257SNFP#U0 Renesas Electronics America, R5F21257SNFP#U0 Datasheet - Page 310

• Manufacturer Part Number: R5F21257SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21257SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• For Use With: R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 15.4
UARTi Bit Rate Register (i = 0 or 1)
UARTi Transmit/Receive Mode Register (i = 0 or 1)
b7
NOTES:
b7 b6 b5 b4
NOTE:
0
1.
2.
3.
1.
Write to this register w hile the serial I/O is neither transmitting nor receiving.
Use the MOV instruction to w rite to this register.
After setting the CLK0 to CLK1 bits of the UiC0 register, w rite to the UiBRG register.
Set the PD1_6 bit in the PD1 register to 0 (input).
Feb 29, 2008
b3 b2 b1 b0
Registers U0BRG to U1BRG and U0MR to U1MR
b0
Assuming the set value is n, UiBRG divides the count source by n+1
Bit Symbol
Symbol
U0BRG
U1BRG
Symbol
CKDIR
U0MR
U1MR
SMD0
SMD1
SMD2
PRYE
STPS
PRY
(b7)
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Serial I/O mode select bits
Internal/external clock select bit 0 : Internal clock
Stop bit length select bit
Odd/even parity select bit
Parity enable bit
Reserved bit
(1, 2, 3)
Address
Bit Name
00A0h
00A8h
Function
Address
00A1h
00A9h
b2 b1 b0
0 0 0 : Serial interface disabled
0 0 1 : Clock synchronous serial I/O mode
1 0 0 : UART mode transfer data 7 bits long
1 0 1 : UART mode transfer data 8 bits long
1 1 0 : UART mode transfer data 9 bits long
Other than above : Do not set.
1 : External clock
0 : 1 stop bit
1 : 2 stop bits
Enable w hen PRYE = 1
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
Set to 0.
(1)
After Reset
Function
00h
00h
Setting Range
After Reset
00h to FFh
Undefined
Undefined
15. Serial Interface
WO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW