M38039FFHFP#U0 Renesas Electronics America, M38039FFHFP#U0 Datasheet - Page 38

• Manufacturer Part Number: M38039FFHFP#U0
• Description: IC 740 MCU FLASH 60K 64QFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38039FFHFP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 16.8MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3803 Group (Spec.H)
Rev.3.11
REJ03B0017-0311
(6) Programmable waveform generating mode
• Mode selection
This mode can be selected by setting “100” to the timer Z
operating mode bits (bits 2 to 0) and setting “0” to the
timer/event counter mode switch bit (b7) of the timer Z mode
register (address 002A
• Count source selection
In high- or middle-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64,
1/128, 1/256, 1/512 or 1/1024 of f(X
selected as the count source.
In low-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256,
1/512 or 1/1024 of f(X
count source.
• Interrupt
The interrupt at an underflow is the same as the timer mode’s.
• Explanation of operation
The operation is the same as the timer mode’s. Moreover the
timer outputs the data set in the output level latch (bit 4) of the
timer Z mode register (address 002A
each time the timer underflows.
Changing the value of the output level latch and the timer latch
after an underflow makes it possible to output an optional
waveform from the CNTR
• Precautions
The double-function port of CNTR
automatically set to the programmable waveform generating port
in this mode.
Figure.31 shows the timing chart of the programmable waveform
generating mode.
(7) Programmable one-shot generating mode
• Mode selection
This mode can be selected by setting “101” to the timer Z
operating mode bits (bits 2 to 0) and setting “0” to the
timer/event counter mode switch bit (b7) of the timer Z mode
register (address 002A
• Count source selection
In high- or middle-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64,
1/128, 1/256, 1/512 or 1/1024 of f(X
selected as the count source.
• Interrupt
The interrupt at an underflow is the same as the timer mode’s.
The trigger to generate one-shot pulse can be selected by the INT
active edge selection bit (bit 1) of the interrupt edge selection
register (address 003A
selected; when it is “1”, the rising edge active is selected.
When the valid edge of the INT
interrupt request bit (bit 1) of the interrupt request register 1
(address 003C
• Explanation of operation
1. “H” one-shot pulse; Bit 5 of timer Z mode register = “0”
The output level of the CNTR
mode selection. When trigger generation (input signal to
INT
When an underflow occurs, “L” is output. The “H” one-shot
pulse width is set by the setting value to the timer Z register
low-order and high-order. When trigger generating is
detected during timer count stop, although “H” is output
from the CNTR
underflow does not occur.
1
pin) is detected, “H” is output from the CNTR
Apr 5, 2006
16
) is set to “1”.
2
16
16
16
pin, “H” output state continues because an
). When it is “0”, the falling edge active is
CIN
).
).
2
); or f(X
pin.
Page 36 of 113
1
2
CIN
pin is detected, the INT
pin is initialized to “L” at
16
) can be selected as the
IN
IN
2
) from the CNTR
pin and port P4
); or f(X
); or f(X
CIN
CIN
) can be
) can be
2
2
pin.
7
pin
is
1
1
• Precautions
Set the double-function port of INT
this mode.
The double-function port of CNTR
automatically set to the programmable one-shot generating port
in this mode.
This mode cannot be used in low-speed mode.
If the value of the CNTR
during one-shot generating enabled or generating one-shot pulse,
then the output level from CNTR
Figure.32 shows the timing chart of the programmable one-shot
generating mode.
<Notes regarding all modes>
• Timer Z write control
Which write control can be selected by the timer Z write control
bit (bit 3) of the timer Z mode register (address 002A
data to both the latch and the timer at the same time or writing
data only to the latch.
When the operation “writing data only to the latch” is selected,
the value is set to the timer latch by writing data to the address of
timer Z and the timer is updated at next underflow. After reset
release, the operation “writing data to both the latch and the timer
at the same time” is selected, and the value is set to both the latch
and the timer at the same time by writing data to the address of
timer Z.
In the case of writing data only to the latch, if writing data to the
latch and an underflow are performed almost at the same time,
the timer value may become undefined.
• Timer Z read control
A read-out of timer value is impossible in pulse period
measurement mode and pulse width measurement mode. In the
other modes, a read-out of timer value is possible regardless of
count operating or stopped.
However, a read-out of timer latch value is impossible.
• Switch of interrupt active edge of CNTR
Each interrupt active edge depends on setting of the CNTR
active edge switch bit and the INT
• Switch of count source
When switching the count source by the timer Z count source
s e l e c t i o n b i t s , t he v a l u e o f t i m e r c o u n t i s a l t e r e d i n
inconsiderable amount owing to generating of thin pulses on the
count input signals.
Therefore, select the timer count source before setting the value
to the prescaler and the timer.
• Usage of CNTR
To use the CNTR
operating mode bits (b2, b1, b0) of timer Z mode register
(address 002A
2. “L” one-shot pulse; Bit 5 of timer Z mode register = “1”
The output level of the CNTR
mode selection. When trigger generation (input signal to
INT
When an underflow occurs, “H” is output. The “L” one-shot
pulse width is set by the setting value to the timer Z low-
order and high-order. When trigger generating is detected
during timer count stop, although “L” is output from the
CNTR
flow does not occur.
1
pin) is detected, “L” is output from the CNTR
2
pin, “L” output state continues because an under-
16
) to “000”.
2
2
pin as normal I/O port P4
pin as normal I/O port P4
2
active edge switch bit is changed
2
1
pin changes.
1
active edge selection bit.
2
pin and port P4
pin is initialized to “H” at
2
2
pin and port P4
and INT
7
7
, set timer Z
1
2
16
to input in
), writing
2
pin.
7
is
2