HD6413003TF16 Renesas Electronics America, HD6413003TF16 Datasheet - Page 19

• Manufacturer Part Number: HD6413003TF16
• Description: IC H8 MCU ROMLESS QFP112
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Page
P514
P529 to Table 18-4
P536
P520 to Table 18-2
P526
P529 to Table 18-4
P531
P532
P536
P541
P543
P545
P555
P556
P557
P566
P575
P673
Item
17.3.2
Table 18-5
Table 18-8
Figure 18-7
Figure 18-10 DRAM Bus Timing (Read/Write):
Figure 18-13 PSRAM Bus Timing (Read/Write):
Table A-1
Table A-1
Table A-1
Table A-1
Table A-1
Table A-1
Table A-1
Table A-1
Table A-3
Figure C-4
to 18-8
Exit from Sleep Mode
Exit by Interrupt
Electrical Characteristics
DC Characteristics
Bus Timing
Refresh Controller Bus Timing
A/D Conversion Characteristics
DRAM Bus Timing (Read/Write):
Three-State Access
— 2WE Mode —
Three-State Access
— 2CAS Mode —
Three-State Access
Instruction Set
MOV. B Rs, @(d:16, ERd)
Instruction Set
MOV. B Rs, @(d:24, ERd)
Instruction Set
MOV. W Rs, @(d:16, ERd)
Instruction Set
MOV. W Rs, @(d:24, ERd)
Instruction Set MOV. L #xx:32, Rd Number of execution states amended
Instruction Set POP, L ERn
Instruction Set PUSH. L ERn
Instruction Set STC
Number of Cycles per Instruction
BSRd:16
Port 7 Block Diagram (Pin P7n)
Description
Description amended
Condition values amended
Values changed and added to table
Values changed
Values changed
Values changed
*added
*added
*added
Operation amended
Operation amended
Operation amended
Operation and number of execution
states amended
Number of execution states amended
Number of execution states amended
Menmonics amended (3 places)
Internal operation added
Figure amended