HD6413003TF16 Renesas Electronics America, HD6413003TF16 Datasheet - Page 302

IC H8 MCU ROMLESS QFP112

HD6413003TF16

Manufacturer Part Number
HD6413003TF16
Description
IC H8 MCU ROMLESS QFP112
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413003TF16

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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— PWM mode
Phase counting mode selectable in channel 2
Two-phase encoder output can be counted automatically.
Three additional modes selectable in channels 3 and 4
— Reset-synchronized PWM mode
— Complementary PWM mode
— Buffering
High-speed access via internal 16-bit bus
The 16-bit timer counters, general registers, and buffer registers can be accessed at high speed
via a 16-bit bus.
Fifteen interrupt sources
Each channel has two compare match/input capture interrupts and an overflow interrupt. All
interrupts can be requested independently.
Activation of DMA controller (DMAC)
Four of the compare match/input capture interrupts from channels 0 to 3 can start the DMAC.
Output triggering of programmable pattern controller (TPC)
Compare match/input capture signals from channels 0 to 3 can be used as TPC output
triggers.
PWM output can be provided with an arbitrary duty cycle. With synchronization, up to
five-phase PWM output is possible
If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of
complementary waveforms.
If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of
non-overlapping complementary waveforms.
Input capture registers can be double-buffered. Output compare registers can be updated
automatically.
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