UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 350

• Manufacturer Part Number: UPD78F9212CS-CAB-A
• Description: MCU 8BIT 4KB FLASH 16PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9212CS-CAB-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

348
Reset
function
Power-
on-clear
circuit
Low-
voltage
detector
Option
byte
Function
RESF: Reset
control flag
register
Functions of
power-on-clear
circuit
Cautions for
power-on-clear
circuit
LVIM: Low-
voltage detect
register
LVIS: Low-
voltage
detection level
select register
When used as
reset
Cautions for
low-voltage
detector
Oscillation
stabilization
time on power
application or
after reset
release
Control of
RESET pin
Details of
Function
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the
microcontroller can be arbitrarily set by taking action (1) below.
Do not read data by a 1-bit memory manipulation instruction.
If an internal reset signal is generated in the POC circuit, the reset control flag
register (RESF) is cleared to 00H.
Use these products in the following voltage range because the detection voltage
(V
Standard product, (A) grade product: 2.2 to 5.5 V, (A2) grade product: 2.26 to 5.5
V
In a system where the supply voltage (V
vicinity of the POC detection voltage (V
and released from the reset status. In this case, the time from release of reset to
the start of the operation of the microcontroller can be arbitrarily set by taking the
following action.
To stop LVI, follow either of the procedures below.
Be sure to set bits 2 to 6 to 0.
Bits 4 to 7 must be set to 0.
If a value other than the above is written during LVI operation, the value becomes
undefined at the very moment it is written, and thus be sure to stop LVI (bit 7 of
LVIM register (LVION) = 0) before writing.
<1> must always be executed. When LVIMK = 0, an interrupt may occur
immediately after the processing in <3>.
If supply voltage (V
reset signal is not generated.
In a system where the supply voltage (V
vicinity of the LVI detection voltage (V
on how the low-voltage detector is used.
<1> When used as reset
<2> When used as interrupt
Interrupt requests may be frequently generated. Take (b) of action (2) below.
The setting of this option is valid only when the crystal/ceramic oscillation clock is
selected as the system clock source. No wait time elapses if the high-speed
internal oscillation clock or external clock input is selected as the system clock
source.
Because the option byte is referenced after reset release, if a low level is input to
the RESET pin before the option byte is referenced, then the reset state is not
released.
Also, when setting 0 to RMCE, connect the pull-up resistor.
• When using 8-bit manipulation instruction: Write 00H to LVIM.
• When using 1-bit memory manipulation instruction: Clear LVION to 0.
POC
) of the power-on-clear (POC) circuit is the supply voltage range.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16994EJ6V0UD
DD
) ≥ detection voltage (V
Cautions
LVI
POC
), the operation is as follows depending
DD
DD
) fluctuates for a certain period in the
) fluctuates for a certain period in the
), the system may be repeatedly reset
LVI
) when LVIM is set to 1, an internal
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