UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 74

• Manufacturer Part Number: UPD78F9212CS-CAB-A
• Description: MCU 8BIT 4KB FLASH 16PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9212CS-CAB-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

4.4
4.4.1
(1) In output mode
(2) In input mode
4.4.2
(1) In output mode
(2) In input mode
4.4.3
(1) In output mode
(2) In input mode
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The operation of a port differs, as follows, depending on the setting of the I/O mode.
Caution Although a 1-bit memory manipulation instruction manipulates 1 bit, it accesses a port in 8-bit
A value can be written to the output latch by a transfer instruction. In addition, the contents of the output latch are
output from the pin. Once data is written to the output latch, it is retained until new data is written to the output
latch.
When a reset signal is generated, cleans the data in the output latch.
A value can be written to the output latch by a transfer instruction. Because the output buffer is off, however, the
pin status remains unchanged.
Once data is written to the output latch, it is retained until new data is written to the output latch.
When a reset signal is generated, cleans the data in the output latch.
The contents of the output latch can be read by a transfer instruction. The contents of the output latch remain
unchanged.
The pin status can be read by a transfer instruction. The contents of the output latch remain unchanged.
An operation is performed on the contents of the output latch and the result is written to the output latch. The
contents of the output latch are output from the pin.
Once data is written to the output latch, it is retained until new data is written to the output latch.
Reset signal generation clears the data in the output latch.
The pin level is read and an operation is performed on its contents. The operation result is written to the output
latch. However, the pin status remains unchanged because the output buffer is off.
When a reset signal is generated, cleans the data in the output latch.
Operation of Port Function
Writing to I/O port
Reading from I/O port
Operations on I/O port
units. Therefore, the contents of the output latch of a pin in the input mode, even if it is not
subject to manipulation by the instruction, are undefined in a port with a mixture of inputs and
outputs.
CHAPTER 4 PORT FUNCTIONS
User’s Manual U16994EJ6V0UD