EP4CE55F23C8 Altera, EP4CE55F23C8 Datasheet - Page 120

• Manufacturer Part Number: EP4CE55F23C8
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C8

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

6–12
I/O Standards
Table 6–3. Cyclone IV Devices Supported I/O Standards and Constraints (Part 1 of 2)
Cyclone IV Device Handbook, Volume 1
3.3-V LVTTL,
3.3-V LVCMOS
3.0-V LVTTL,
3.0-V LVCMOS
2.5-V LVTTL /
LVCMOS
1.8-V LVTTL /
LVCMOS
1.5-V LVCMOS
1.2-V LVCMOS
SSTL-2 Class I,
SSTL-2 Class II
SSTL-18 Class I,
SSTL-18 Class II
HSTL-18 Class I,
HSTL-18 Class II
HSTL-15 Class I,
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
PCI and PCI-X
Differential SSTL-2
Class I or Class II
Differential SSTL-18
Class I or Class II
Differential HSTL-18
Class I or Class II
Differential HSTL-15
Class I or Class II
Differential HSTL-12
Class I or Class II
I/O Standard
(2)
(2)
(4)
(9)
Single-ended JESD8-B
Single-ended JESD8-B
Single-ended JESD8-5
Single-ended JESD8-7
Single-ended JESD8-11
Single-ended JESD8-12A
voltage-
referenced
voltage-
referenced
voltage-
referenced
voltage-
referenced
voltage-
referenced
voltage-
referenced
Single-ended
Differential
(5)
Differential
(5)
Differential
(5)
Differential
(5)
Differential
(5)
Cyclone IV devices support multiple single-ended and differential I/O standards.
Cyclone IV devices support 3.3-, 3.0-, 2.5-, 1.8-, 1.5-, and 1.2-V I/O standards.
Table 6–3
I/O pins support them.
Type
summarizes I/O standards supported by Cyclone IV devices and which
JESD8-9A
JESD815
JESD8-6
JESD8-6
JESD8-16A
JESD8-16A
JESD8-9A
JESD815
JESD8-6
JESD8-6
JESD8-16A
Standard
Support
—
3.3/3.0/2.5
3.3/3.0/2.5
3.3/3.0/2.5
1.8/1.5(3)
1.8/1.5(3)
Input
1.8
1.8
1.5
(3)
(3)
(3)
1.2
2.5
1.2
1.2
3.0
2.5
1.8
1.8
1.5
1.2
V
—
—
—
—
—
CCIO
Level (in V)
Output
3.3
3.0
2.5
1.8
1.5
1.2
2.5
1.8
1.8
1.5
1.2
1.2
3.0
2.5
1.8
1.8
1.5
1.2
—
—
—
—
—
CLK,
DQS
v
v
v
v
v
v
v
v
v
v
v
v
v
—
v
—
v
—
v
—
v
—
v
Chapter 6: I/O Features in Cyclone IV Devices
Column I/O Pins
PLL_OUT
© December 2010 Altera Corporation
v
v
v
v
v
v
v
v
v
v
v
v
v
v
—
v
—
v
—
v
—
v
—
User
Pins
I/O
v
v
v
v
v
v
v
v
v
v
v
v
v
—
—
—
—
—
—
—
—
—
—
Row I/O
CLK,
DQS
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
I/O Standards
—
—
—
—
—
—
User I/O
Pins(1)
Pins
v
v
v
v
v
v
v
v
v
v
v
v
—
—
—
—
—
—
—
—
—
—
—