EP4CE55F23C8 Altera, EP4CE55F23C8 Datasheet - Page 370

• Manufacturer Part Number: EP4CE55F23C8
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C8

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

2–4
Table 2–3. Blocks Affected by Reset and Power-Down Signals (Part 2 of 2)
Transceiver Reset Sequences
Cyclone IV Device Handbook, Volume 2
Receiver Byte Ordering
Receiver Phase
Compensation FIFO
Receiver XAUI State
Machine
BIST Verifiers
Transceiver Block
1
1
You can configure transceiver channels in Cyclone IV GX devices in various
configurations. In all functional modes except XAUI functional mode, transceiver
channels can be either bonded or non-bonded. In XAUI functional mode, transceiver
channels must be bonded. In PCI Express
channels can be either bonded or non-bonded and need to follow a specific reset
sequence.
The two categories of reset sequences for Cyclone IV GX devices described in this
chapter are:
■
■
The busy signal remains low for the first reconfig_clk clock cycle. It then gets
asserted from the second reconfig_clk clock cycle. Subsequent deassertion of the
busy signal indicates the completion of the offset cancellation process. This busy
signal is required in transceiver reset sequences except for transmitter only channel
configurations. Refer to the reset sequences shown in
references listed in the notes for the figure.
Altera strongly recommends adhering to these reset sequences for proper operation of
the Cyclone IV GX transceiver.
“All Supported Functional Modes Except the PCIe Functional Mode” on
page
configurations.
“PCIe Functional Mode” on page
initialization/compliance phase and the normal operation phase in PCIe
functional modes.
rx_digitalreset
2–5—describes the reset sequences in bonded and non-bonded
v
v
v
v
rx_analogreset
—
—
—
—
tx_digitalreset
2–16—describes the reset sequence for the
®
—
—
—
—
(PCIe
Chapter 2: Cyclone IV Reset Control and Power Down
®
) functional mode, transceiver
Figure 2–2
pll_areset
© December 2010 Altera Corporation
—
—
—
—
and the associated
Transceiver Reset Sequences
gxb_powerdown
v
v
v
v