EP4CE55F23C8 Altera, EP4CE55F23C8 Datasheet - Page 175

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EP4CE55F23C8

Manufacturer Part Number
EP4CE55F23C8
Description
IC CYCLONE IV FPGA 55K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er

Specifications of EP4CE55F23C8

Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2340000
Number Of I /o
324
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
Table 8–4. Configuration Schemes for Cyclone IV GX Devices (EP4CGX30 [only for F484 package], EP4CGX50, EP4CGX75,
EP4CGX110, and EP4CGX150) (Part 2 of 2)
Table 8–5. Configuration Schemes for Cyclone IV E Devices
© December 2010 Altera Corporation
Notes to
(1) Configuration voltage standard applied to the V
(2) JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored.
(3) Do not leave the MSEL pins floating. Connect them to V
Notes to
(1) Configuration voltage standard applied to the V
(2) JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored.
(3) Do not leave the MSEL pins floating. Connect them to V
JTAG-based configuration
JTAG-based configuration
Configuration Scheme
Configuration Scheme
Altera recommends connecting the MSEL pins to GND if your device is only using JTAG configuration.
Altera recommends connecting the MSEL pins to GND if your device is only using JTAG configuration.
Table
Table
FPP
AS
AP
PS
(2)
(2)
8–4:
8–5:
1
Smaller Cyclone IV E devices or package options (E144 and F256 packages) do not
have the MSEL[3]pin. The AS Fast POR configuration scheme at 3.0- or 2.5-V
configuration voltage standard and the AP configuration scheme are not supported in
Cyclone IV E devices without the MSEL[3]pin. To configure these devices with other
supported configuration schemes, select MSEL[2..0]pins according to the MSEL
settings in
MSEL3 MSEL2 MSEL1 MSEL0
MSEL3
(3)
(3)
1
0
0
0
0
0
0
1
1
1
0
1
1
Table
MSEL2
(3)
(3)
8–5.
1
1
0
0
1
1
1
0
0
1
0
1
1
CCIO
CCIO
supply of the bank in which the configuration pins reside.
supply of the bank in which the configuration pins reside.
CCA
MSEL1
CCA
(3)
(3)
or GND. These pins support the non-JTAG configuration scheme used in production.
0
0
1
1
0
1
1
1
0
0
0
1
1
or GND. These pins support the non-JTAG configuration scheme used in production.
MSEL0
(3)
(3)
1
0
0
1
1
0
1
1
0
0
0
0
1
POR Delay
POR Delay
Standard
Standard
Standard
Standard
Standard
Standard
Fast
Fast
Fast
Fast
Fast
Fast
Fast
Configuration Voltage Standard (V)
Configuration Voltage Standard (V)
Cyclone IV Device Handbook, Volume 1
3.3, 3.0, 2.5
3.3, 3.0, 2.5
3.3, 3.0, 2.5
3.0, 2.5
1.8, 1.5
3.0, 2.5
3.0, 2.5
3.3
3.3
3.3
1.8
3.3
1.8
(1)
(1)
8–9

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