EP4CE55F23C8 Altera, EP4CE55F23C8 Datasheet - Page 324

• Manufacturer Part Number: EP4CE55F23C8
• Description: IC CYCLONE IV FPGA 55K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV Er

Specifications of EP4CE55F23C8

• Number Of Logic Elements/cells: 55856
• Number Of Labs/clbs: 3491
• Total Ram Bits: 2340000
• Number Of I /o: 324
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

1–44
Cyclone IV Device Handbook, Volume 2
Figure 1–45
mode with the 8-bit and 10-bit PMA-PCS interface width respectively.
Figure 1–45. Supported Transceiver Configurations in Basic Mode with the 8-bit PMA-PCS Interface
Width
Functional Mode
Channel Bonding
Low-Latency PCS
Word Aligner (Pattern Length)
8B/10B Encoder/Decoder
Rate Match FIFO
Byte SERDES
Byte Ordering
FPGA Fabric-to-Transceiver
Interface Width
FPGA Fabric-to-Transceiver
Interface Frequency (MHz)
Data Rate (Gbps)
and
Figure 1–46
Applicable for devices in
F324 and smaller packages
show the supported transceiver configurations in Basic
Disabled
Disabled
156.25
8-Bit
0.6-
1.25
0.6-
125
1.0
75-
75-
Manual Alignment
Disabled
Disabled
(16-Bit)
Disabled
156.25
16-Bit
37.5-
37.5-
125
Enabled
0.6-
0.6-
2.0
2.5
Enabled
156.25
Disabled
16-Bit
37.5-
37.5-
125
Basic (8-Bit PMA-PCS Interface Width)
Chapter 1: Cyclone IV Transceivers Architecture
Disabled
Disabled
156.25
8-Bit
1.25
0.6-
0.6-
125
75-
75-
1.0
Applicable for devices in
F484 and larger packages
Disabled
Disabled
(16-Bit)
Bit Slip
×1, ×2, ×4
Disabled
Enabled
156.25
16-Bit
37.5-
37.5-
0.6-
0.6-
125
1.0
2.5
© December 2010 Altera Corporation
Disabled
Disabled Disabled
156.25
Transceiver Functional Modes
0.6-
1.25
8-Bit
125
0.6-
75-
75-
1.0
Disabled
Disabled
Disabled
Enabled
Enabled
156.25
16-Bit
37.5-
37.5-
0.6-
1.25
125
0.6-
1.0