MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 30

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Basis Chip, combining:
integrated CAN interface and for additional ICs such as
sensors, CAN transceiver.
2 and -5), with local and bus failure diagnostic, protection and
fail safe operation mode.
POWER SUPPLY (VSUP1 AND VSUP2)
the VDD regulator. VSUP2 is the input pin for the 5 V-CAN
regulator, LINs interfaces and I/O functions. The VSUP block
includes over and under-voltage detections which can
generate interrupt. The device includes a loss of battery
detector connected to VSUP1.
This generates a POR (Power On Reset).
VDD VOLTAGE REGULATOR (VDD)
mode and Low Power mode). It can operate with or without
an external PNP transistor.
capability is 150 mA. Current limitation, temperature
prewarning flag and over-temperature shutdown features are
included. When V
controlled. Output voltage is 5.0 V. A 3.3 V option is available
via dedicated part number.
transistor must be connected to VEM (PNP emitter) and VB
(PNP base) pins, in order to increase total current capability
and share the power dissipation between internal VDD
transistor and the external transistor. See
Q1 (VE and
than 150 mA, depending upon ambient temperature,
maximum supply and thermal resistance. Typically, above
100-200 mA, an external ballast transistor is recommended.
VDD REGULATOR IN LOW POWER MODE
V
below typ 1.5 mA (
supplied up to a tenth of a mA. Current in excess of 1.5 mA
is detected, and this event is managed by the device logic
(wake-up detection, timer start for over-current duration
monitoring or watchdog refresh).
30
33903/4/5
FUNCTIONAL DESCRIPTION
INTRODUCTION
DD
The MC33903_4_5 is the second generation of System
- Advanced power management unit for the MCU, the
- Built in enhanced high speed CAN interface (ISO11898-
VSUP1 is the input pin for the device internal supply and
Loss of battery is reported through a bit (called BATFAIL).
The regulator has two main modes of operation (Normal
In Normal mode, without external PNP, the max DC
If current higher than 150 mA is required, an external PNP
When the device is set in Low Power V
regulator is able to supply the MCU with a DC current
VB). The PNP can be used even if current is less
DD
L
P-ITH
is turned ON, rise time from 0 to 5.0 V is
). Transient current can also be
External Transistor
DD
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
ON mode, the
INTRODUCTION
specification, with local and bus failure diagnostic and
protection.
machine solution.
with pin compatibility.
EXTERNAL TRANSISTOR Q1 (VE AND VB)
external P type transistor, with the objective to share the
power dissipation between the internal transistor of the V
regulator and the external transistor. The bipolar PNP
recommended transistor are MJD42C or BCP52-16.
between the internal path transistor and the external PNP,
with the following typical ratio: 1/3 in the internal transistor
and 2/3 in the external PNP. The PNP activation and control
is done by SPI.
transistor. In this case, the VEM and VB pins must remain
open.
5 V-CAN VOLTAGE REGULATOR FOR CAN AND
ANALOG MUX
is required at 5 V-CAN pin. Analog MUX and part of the LIN
interfaces are supplied from 5 V-CAN. Consequently, the
5 V-CAN must be ON in order to have Analog MUX operating
and to have the LIN interface operating in TxD/RxD mode.
by SPI. In Debug mode 5 V-CAN is ON be default.
V AUXILIARY OUTPUT, 5.0 AND 3.3 V
SELECTABLE (VB-AUX, VC-AUX, AND VCAUX) -
Q2
output, 5.0 or 3.3 V, selectable by the SPI. It uses an external
PNP pass transistor for flexibility and power dissipation
constraints. The external recommended bipolar transistors
are MJD42C or BCP52-16.
OFF. V
information will disable V
can generate INT.
- Built in LIN interface, compliant to LIN 2.1 and J2602-2
- Innovative and hardware configurable fail safe state
- Multiple low power modes, with low current consumption.
- Family concept; with and without LIN interface devices
The device has a dedicated circuit to allow usage of an
When the external PNP is connected, the current is shared
The device is able to operate without an external
This regulator is supplied from the VSUP2 pin. A capacitor
5 V-CAN regulator is OFF by default and must be turn ON
The VAUX block is used to provide an auxiliary voltage
An over-current and under-voltage detectors are provided.
V
V
AUX
AUX
AUX
is controlled via the SPI, and can be turned ON or
is OFF by default and must be turned ON by the SPI.
low threshold detection and over-current
Analog Integrated Circuit Device Data
AUX
, and are reported in the SPI and
Freescale Semiconductor
DD