MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 34

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

and conditions to enter or leave each modes are illustrated in
the state diagram.
INIT RESET
on”. In this mode, the RST pin is asserted low, for a duration
of typ 1.0 ms. Control bits and flags are “set” to their default
reset condition. The BATFAIL is set to indicated that the
device is coming from an unpowered condition, and that all
previous device configuration are lost and “reset” the default
value. The duration of the INIT reset is typ 1.0 ms.
the expected SPI command does not occur in due time (ref.
INIT mode), and if device is not in debug mode.
INIT
mode. In this mode, the device must be configured via SPI
within a time of 256 ms max.
and INIT MISC must be and can only be configured during
INIT mode.
can be also written in other modes.
Watchdog Refresh command must be send in order to set the
device into Normal mode. If the SPI W/D refresh does not
occur within the 256 ms period, the device will return into INIT
reset mode for typ 1.0 ms, and then re enter into INIT mode.
device status or to read back the INIT register configuration
is only possible to re enter the INIT mode using a secured SPI
command. In INIT mode, the CAN, LIN1, LIN2, VAUX, I/O_x
and Analog MUX functions are not operating. The 5V-CAN is
also not operating, except if the Debug mode is detected.
RESET
entered from Normal mode, Normal Request mode, LP V
on mode and from Flash mode, when the W/D is not
triggered, or if a V
defined a longer Reset pulse activation only for the case the
reset mode is entered following a V
pulse is always 1.0 ms, in case reset mode is entered due to
wrong a watchdog refresh command.
NORMAL REQUEST
after a wake-up from Low Power V
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FUNCTIONAL DEVICE OPERATION
MODE AND STATE DESCRIPTION
The device has several operation modes. The transitions
This mode is automatically entered after device “power
INIT reset mode is also entered from INIT mode in case
This mode is automatically entered from “INIT reset”
Four registers called INIT Wdog, INIT REG, INIT LIN I/O
Other registers can be written in this mode, however they
Once the INIT registers configuration is done, a SPI
Register read operation is allowed in INIT mode to collect
When INIT mode is left by a SPI W/D refresh command, it
In this mode, the RST pin is asserted low. Reset mode is
The duration of reset is typ 1.0 ms by default. The user can
Reset mode can be entered via secured SPI command.
This mode is automatically entered after RESET mode, or
DD
low condition is detected.
DD
DD
ON mode.
FUNCTIONAL DEVICE OPERATION
low condition. Reset
MODE AND STATE DESCRIPTION
DD
transition to NORMAL mode. The duration of the Normal
request mode is 256 ms when Normal Request mode is
entered after RESET mode. Different duration can be
selected by SPI for the case when normal request is entered
from LP V
within the 256 ms (or the shorter user defined time out), then
the device will enter into RESET mode, for a duration of typ
1.0 ms.
well as in low power modes, the V
disabled.
NORMAL
is entered by a SPI watchdog refresh command from Normal
Request mode, or from INIT mode.
operating, and a periodic watchdog refresh must occurs. In
case of incorrect or missing watchdog refresh command
device will enter into Reset mode.
command into Low Power modes (Low Power V
Low Power V
commands must be used to enter from Normal mode in Reset
mode, INIT mode or Flash mode.
FLASH
to typ 32 seconds. This allow programming of the MCU flash
memory while minimizing the software over head to refresh
the watchdog. The flash mode is entered by Secured SPI
command and is left by SPI command. Device will enter into
Reset mode. In case of incorrect or missing watchdog refresh
command device will enter into Reset mode. An interrupt can
be generated at 50% of the watchdog period.
CAN bus, inside the vehicle.
DEBUG
allows system easy software and hardware debugging. The
debug operation is detected after power up if the DBG pin is
set in the 8.0 to 10 V range.
operations are disabled: 256 ms of INIT mode, watchdog
refresh of Normal mode and Flash mode, Normal Request
time out (256 ms or user defined value) are not operating and
will not lead to transition into INIT reset or Reset mode.
without any time constraints with respect to watchdog
A watchdog refresh SPI command is necessary to
If the watchdog refresh SPI command does not occur
Note: in init reset, init, reset and normal request modes as
In this mode, all device functions are available. This mode
During Normal mode, the device watchdog function is
From Normal mode, the device can be set by SPI
In this mode, the software watchdog period is extended up
CAN interface operates in Flash mode to allow flash via
Debug is a special operation mode of the device which
When debug is detected, all the software watchdog
When device is in Debug, SPI command can be send
DD
ON mode.
DD
OFF modes). Dedicated secured SPI
Analog Integrated Circuit Device Data
DD
Freescale Semiconductor
external PNP is
DD
ON or