MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 77

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog Integrated Circuit Device Data
Freescale Semiconductor
Table 35. LIN 1 Register, LIN1
Notes
31.
32.
[b_15 b_14] 10_010 [P/N]
MOSI First byte [15-8]
b7 b6
b5 b4
Bits
Condition for default
00
01
10
11
00
01
10
11
b2
b0
0
1
0
1
The LIN interface can be set in TxD/RxD mode only when the TXDL input signal is in recessive state. An attempt to set TxD/RxD
mode, while TXDL is low, will be ignored and the LIN interface remains disabled.
In order to use LIN interface, the 5V-CAN regulator must be ON.
01 10_ 011P
Default state
LIN mode [1], LIN mode [0] - LIN 1 interface mode control, wake-up enable / disable
LIN1 disable, wake-up capability disable
not used
LIN1 disable, wake-up capability enable
LIN1 Transmit Receive mode
Slew rate[1], Slew rate[0] LIN 1 slew rate selection
Slew rate for 20 kbit/s baud rate
Slew rate for 10 kbit/s baud rate
Slew rate for fast baud rate
Slew rate for fast baud rate
LIN T1 on
LIN 1 termination OFF
LIN 1 termination ON
V
LIN goes recessive when device V
LIN continues operation below V
SUP
ext
LIN mode[1]
bit 7
0
(32)
LIN mode[0]
(31)
bit 6
SUP2
0
SUP2
6.0 V, until 5 V-CAN is disabled.
is below typ 6.0 V. This is to meet J2602 specification
Slew rate[1]
bit 5
0
Slew rate[0]
Description
MOSI Second Byte, bits 7-0
bit 4
0
POR
DETAIL OF CONTROL BITS AND REGISTER MAPPING
bit 3
0
-
LIN T1 on
bit 2
0
SERIAL PERIPHERAL INTERFACE
bit 1
0
-
Vsup ext
bit 0
33903/4/5
0
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