MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 49

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MCZ33905S5EK

Manufacturer Part Number
MCZ33905S5EK
Description
IC SYSTEM BASIS CHIP GEN2 32SOIC
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCZ33905S5EK

Applications
System Basis Chip
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Package / Case
32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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interface. It consist in a low side driver between CANL and
gnd, and high side driver from CANH to 5 V-CAN. Two
differential receivers are connected between CANH and
CANL, to detect bus state and to wake up from CAN Sleep
CAN INTERFACE SUPPLY
The CAN interface also has a supply pass from the battery
line, through the VSUP2 pin. This pass is used in CAN Sleep
mode to allow wake-up detection.
the CAN interface current is sourced from the 5 V-CAN pin.
During CAN Low Power mode, the current is sourced from
the VSUP2 pin.
TXD/RXD MODE
are ON. In this mode, the CAN lines are controlled by the TXD
pin level, and the CAN bus state is reported on the RXD pin.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The figure below is a high level schematic of the CAN
The supply voltage for the CAN driver is the 5 V-CAN pin.
During CAN communication (transmission and reception),
In TxD/RxD mode, both the CAN driver and the receiver
5 V-CAN
RXD
TXD
SPI & State machine
SPI & State machine
5 V-CAN
SPI & State machine
Figure 30. CAN Interface Block Diagram
CAN INTERFACE DESCRIPTION
CAN INTERFACE
2.5 V
Thermal
Failure Detection
& Management
Differential
Detection
Pattern
Receiver
Driver
mode. An internal 2.5 V reference provide the 2.5 V
recessive level via the matched R
can be switched to GND in CAN Sleep mode. A dedicated
split buffer provide a low-impedance 2.5 V to the Split pin, for
recessive level stabilization.
driver and receiver.The SPLIT pin is active and a 2.5 V
biasing is provided on the SPLIT output pin.
RECEIVE ONLY MODE
CAN receiver active. In this mode, the device is only able to
report the CAN state on the RXD pin. The TXD pin has no
effect on CAN bus lines. The 5 V-CAN regulator must be ON.
The SPLIT pin is active and a 2.5 V biasing is provided on the
SPLIT output pin.
OPERATION in TXD/RXD Mode
Normal mode and the TXD pin is recessive.
Driver
The 5 V-CAN regulator must be ON. It supplies the CAN
This mode is used to disable the CAN driver, but leave the
The CAN driver will be enable as soon as the device is in
5 V-CAN
VSUP2
R
R
Wake-up
IN
IN
Receiver
QL
QH
Buffer
CAN INTERFACE DESCRIPTION
IN
CANH
CANL
SPLIT
resistors. The resistors
CAN INTERFACE
33903/4/5
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