MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 45

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

OVERVIEW
occur. The “Safe state” condition is defined by the resistor
connected at the DGB pin. Safe mode is entered after
additional event or conditions are met: time out for CAN
communication and state at I/O-1 pin.
event: in the safe state the device is automatically wakeable
CAN and I/O (if configured as inputs). Upon wake-up, the
device operation is resumed: enter in Reset mode.
FAIL SAFE FUNCTIONALITY
RESET), the Safe mode can be entered. In this mode, the
SAFE pin is active low.
Description
condition that make the SAFE pin activated have not
recovered, the device can help to reduce ECU consumption,
assuming that the MCU is not able to set the whole ECU in
low power mode. Two main cases are available:
Mode A:
stays ON), until the failure condition recovers (i.e S/W is able
Exit of Safe Mode
a wake-up event: in this safe state the device is automatically
wakeable by CAN and I/O (if I/O wake-up was enable by the
Analog Integrated Circuit Device Data
Freescale Semiconductor
Fail safe mode is entered when specific fail conditions
Exit of the safe state is always possible by a wake-up
Upon dedicated event or issue detected at a device pin (i.e
Exit of the safe state with V
Table 7. Fail Safe Options
Upon activation of the SAFE pin, and if the failure
Upon SAFE activation, the MCU remains powered (V
Resistor at
DBG pin
typ 15 k
typ 33 k
typ 68 k
<6.0 k
bits [2,1,0) = [111]: verification enable: resistor at DBG pin is typ
bits [2,1,0) = [110]: verification enable: resistor at DBG pin is typ
bits [2,1,0) = [101]: verification enable: resistor at DBG pin is typ
bits [2,1,0) = [100]: verification enable: resistor at DBG pin is typ
15 kohm (RB1) - Selection of SAFE mode B1
68 kohm (RB3) - Selection of SAFE mode B3
SPI coding - register INIT MISC bits [2,1,0]
33 kohm (RB2 - Selection of SAFE mode B2
0 kohm (RA) - Selection of SAFE mode A
(higher priority that Resistor coding)
DD
OFF is always possible by
FAIL SAFE OPERATION
DD
to properly control the device and properly refresh the
watchdog).
Modes B1, B2 and B3:
external event, and disable the MCU supply (turn V
The external events monitored are: CAN traffic, I/O-1 low
level or both of them. 3 sub cases exist, B1, B2 and B3.
are no longer active, thus that the car is being parked and
stopped. The I/O low level detection can also indicate that the
vehicle is being shutdown, if the I/O-1 pin is connected for
instance to a switched battery signal (ignition key on/off
signal).
hardware, via the resistor connected at DBG pin, but can be
over written by software, via a specific SPI command.
value at DBG pin (upon transition from INIT to Normal mode),
and, if no specific SPI command related to Debug resistor
change is send, operates according to the detected resistor.
device behaviour, to either confirm or change the hardware
selected behaviour. Device will then operate according to the
SAFE mode configured by the SPI.
SPI prior to enter in SAFE mode). Upon wake-up, the device
operation is resumed, and device enters in Reset mode. The
SAFE pin remains active, until a proper read and clear of the
SPI flags reporting the SAFE conditions.
Upon SAFE activation, the system continues to monitor
Note: no CAN traffic indicates that the ECU of the vehicle
The selection of the monitored events is done by
By default, after power up the device detect the resistor
The INIT MISC register allow to verify and change the
Table 7
Safe mode
code
B1
B2
B3
A
illustrates the complete options available:
BEHAVIOR AT POWER UP AND POWER DOWN
Turn OFF 8.0 s after CAN traffic bus idle detection.
Turn OFF 8.0 s after CAN traffic bus idle detection
Turn OFF when I/O-1 low level detected.
AND when I/O-1 low level detected.
remains ON
V
DD
status
FAIL SAFE OPERATION
DD
33903/4/5
OFF).
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