MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 35

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

operation, MCU program can be “halted” or “paused” to verify
proper operation.
mode with V
up flags must be cleared (ref to mode register). If the wake-
up flags are not cleared, the device will not enter into Low
Power mode. In addition, the CAN failure flags (i.e CAN_F
and CAN_UF) must be cleared, in order to meet the Low
Power current consumption specification.
LOW POWER - V
VDD is unsupplied. This mode is entered by the SPI. It can
also be entered by automatic transition due to fail safe
management. 5 V-CAN and V
OFF.
monitors external events to wake-up and leave the LP mode.
The wake-up events can occurs from:
reset mode and then into Normal Request mode. The wake-
up source are reported into the device SPI registers. In
summary, a wake-up event from LP V
regulator turn ON, and MCU operation restart.
LOW POWER - V
(or 3.3 V, depending upon device part number). The
objective is to maintain the MCU powered, with reduced
consumption. In such mode, the DC output current is
expected to be limited to 100 μA or a few mA, as the ECU is
in reduced power operation mode.
Analog Integrated Circuit Device Data
Freescale Semiconductor
The device has two main Low Power modes: Low Power
Prior to entering into Low Power mode, I/O and CAN wake
In this mode, V
When the device is in Low Power V
• CAN
• LIN interface, depending upon device part number
• Expiration of an internal timer
• I/O-0, and I/O-1 inputs, and depending upon device part
• Cyclic sense of I/O-1 input, associated by I/O-0
When a wake-up event is detected, the device enters into
In this mode, the voltage at the VDD pin remains at 5.0 V
number and configuration, I/O-2 and/or -3 input
activation, and depending upon device part number and
configuration, cyclic sense of I/O-2 and -3 input,
associated by I/O-0 activation
DD
OFF, and Low Power mode with V
DD
DD
DD
is turned off and the MCU connected to
OFF
ON
AUX
regulators are also turned
DD
DD
OFF, lead to V
OFF mode, it
DD
LOW POWER MODES
on.
DD
pin, or by SPI command (ref to MODE register).
OFF. The optional external PNP at VDD will also be
automatically disabled when entering this mode.
LIN, I/O, timer, cyclic sense) are available in LP V
mode.
available.
several tenths of mA DC. The current source capability can
be time limited, by a selectable internal timer. Timer duration
is up to 32 ms, and is triggered when the output current
exceed the output current threshold typ 1.5 mA.
while the device remains in LP V
exceed the selected time (ex 32 ms), the device will detect a
wake-up.
pulse at INT pulse. The MCU will detect the INT pulse and
resume operation.
Watchdog Function in LP V
Power V
remains in LP V
timeout expired or voltage conditions), or via a SPI command,
or by external event such as a wake-up. Some mode change
are performed via “secured” SPI commands.
Debug can be left by removing 8 to 10 V from the DEBUG
5 V-CAN regulator is ON by default in debug mode.
During this mode, the 5 V-CAN and V
The same wake-up events as in LP V
In addition, two additional wake-up conditions are
• Dedicated SPI command. When device is in LP V
• Output current from VDD exceeding L
In Low Power V
This allow for instance a periodic activation of the MCU,
Wake-up events are reported to the MCU via a low level
It is possible to enable the watchdog function in Low
Refresh of the watchdog is done either by:
• a dedicated SPI command (different from any other SPI
• or by a temporary (less than 32 ms max) V
As long as the watchdog refresh occurs, the device
MODE transition
Mode transitions are either done automatically (i.e after
mode, the wake-up by SPI command uses a write to
“Normal Request mode”, 0x5C10.
command or simple CS activation which would wake-up
- ref to the previous paragraph)
current wake-up (I
DD
ON mode. In this case, the principle is timeout.
DD
DD
on mode.
ON mode, the device is able to source
DD
FUNCTIONAL DEVICE OPERATION
> 1.5 mA typ).
DD
DD
ON mode
on mode. If the duration
LOW POWER MODES
DD
AUX
OFF mode (CAN,
P-ITH
regulators are
DD
threshold.
DD
over
33903/4/5
on
DD
ON
35