MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 58

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BITS 15, 14 AND 8 FUNCTIONS
coded on five bits (bits 13 to 9).
function. Data can be written to the register, to control the
device operation or set default value or behavior.
that its content (default setting or value previously written) is
correct.
flags.
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Table 11. Device Registers with Corresponding Address
SERIAL PERIPHERAL INTERFACE
DETAIL OPERATION
Table 10. SPI Operations (bits 8, 14 & 15)
Table 10
BITS 13-9 FUNCTIONS
The device contains several registers. Their address is
Each register controls or reports part of the device
Every register can also be read back in order to ensure
MOSI[13-9]
In addition some of the registers are used to report device
Address
Control Bits MOSI[15-14], C1-C0
A4...A0
0_0000
0_0001
0_0010
0_0011
0_0100
0_0101
0_0110
0_0111
0_1000
0_1001
summarizes the various SPI operation, depending upon bit 15, 14, and 8.
00
01
10
11
Initialization Miscellaneous functions
Initialization LIN and I/O
Initialization Regulators
Initialization Watchdog
Analog Multiplexer
Memory byte A
Memory byte B
Memory byte C
Memory byte D
Specific modes
Description
Read back of register
content and block (CAN,
I/O, INT, LINs) real time
state. See
Write to register
address, to control
device operation
Reserved
Read of device flags
form a register address
Type of Command
Table
37.
DETAIL OPERATION
SPE_MODE
Quick Ref.
Init LIN I/O
MOSI[8] P/N
Init MISC
Parity/Next
Init REG
Init W/D
RAM_A
RAM_B
RAM_C
RAM_D
Name
MUX
1
0
1
1
Device status on MISO
control bit into the device, the MISO pin reports a 16 bits fixed
device status composed of 2 bytes: Device Fixed Status (bits
15 to 8) + extended Device Status (bits 7 to 0). In a read
operation, MISO will report the Fixed device status (bits 15 to
8) and the next eight bits will be the content of the selected
register.
REGISTER ADRESS TABLE
address, coded with bits 13 to 9.
When a write operation is performed to store data or
Table 11
1) Write to register to select device Specific mode, using “Inverted
Bit 8 must be set to 1, independently of the parity function
selected or not selected.
If bit 8 is set to “0”: means parity not selected OR
parity is selected AND parity = 0
if bit 8 is set to “1”: means parity is selected AND parity = 1
Bit 8 must be set to 1, independently of the parity function
selected or not selected.
2) Read back “initialization control bits” from register address
1) Write “device initialization control bits” to register address.
1) Write “device control bits” to register address.
is the list of device registers and their associated
2) Read back “data byte” from register address
1) Write “data byte” to register address.
2) Read back register “control bits”
2) Read “Random Code”
Analog Integrated Circuit Device Data
Note for Bit 8 P/N
Random Code”.
Functionality
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