MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 70

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WATCHDOG AND MODE REGISTERS
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33903/4/5
SERIAL PERIPHERAL INTERFACE
DETAIL OF CONTROL BITS AND REGISTER MAPPING
Table 24. Watchdog Refresh Register, W/D
Table 25. MODE Register, MODE
Notes
27.
[b_15 b_14] 01_101 [P/N]
[b_15 b_14] 01_110 [P/N]
MOSI First Byte [15-8]
MOSI First Byte [15-8]
Condition for default
The Simple Watchdog Refresh command is in hexadecimal: 5A00. This command is used to refresh the W/D and also to transition
from INIT mode to Normal mode, and from Normal Request mode to Normal mode (after a wake-up of a reset)
Table 26. Low Power V
01 01_ 101 P
01 01_ 110 P
Default state
Default state
Table 27. Low Power V
b7, b6, b5, b4, b3
b2, b1, b0
1 0000
1 0001
1 0010
1 0011
1 0100
1 0101
1 0110
1 0111
1 1000
1 1001
1 1010
1 1011
1 1100
1 1101
1 1110
1 1111
b7, b6, b5, b4, b3
mode[4]
bit 7
bit 7
N/A
0
0
0 1100
0 1101
0 1110
0 1111
DD
OFF Selection and FWU / Cyclic Sense Selection
DD
ON selection and operation mode
mode[3]
bit 6
bit 6
N/A
0
0
(27)
Random Code inverted, these 3bits are the inverted bits obtained from the
previous SPI command. The usage of these bits are optional and must be
previously selected in the INIT MISC register [See bit 7 (LPM w RNDM) in
Table
mode[2]
FWU
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
18]
bit 5
bit 5
N/A
0
0
MOSI Second Byte, bits 7-0
MOSI Second Byte, bits 7-0
mode[1]
Cyclic Sense
bit 4
bit 4
N/A
0
0
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
FWU
OFF
OFF
ON
ON
POR
mode[0]
bit 3
bit 3
N/A
0
0
Cyclic INT
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
Analog Integrated Circuit Device Data
Rnd_b[2]
bit 2
bit 2
N/A
0
0
Cyclic Sense
OFF
OFF
Freescale Semiconductor
ON
ON
Watchdog
Rnd_b[1]
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
bit 1
bit 1
ON
ON
ON
ON
ON
ON
ON
ON
N/A
0
0
Rnd_b[0]
bit 0
bit 0
N/A
0
0