MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 85

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MCZ33905S5EK

Manufacturer Part Number
MCZ33905S5EK
Description
IC SYSTEM BASIS CHIP GEN2 32SOIC
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCZ33905S5EK

Applications
System Basis Chip
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Package / Case
32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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FIX AND EXTENDED DEVICE STATUS
a fix status information. This information is either:
Two Bytes
command is used (MOSI bits 15-14, bits C1 C0 = 01)
Table 39. Status Bits Description
Analog Integrated Circuit Device Data
Freescale Semiconductor
For every SPi command the device response on MISO is
Fix Status + Extended Status: when a device write
MOSI
Bits
CAN-LOC
CAN-BUS
VREG-G
SAFE-G
VREG-1
VREG-0
CAN-G
LIN-G
I/O-G
LIN2
LIN1
Bits
I/O-1
I/O-0
RST
INT
WU
INT
15
Indicate that an INT has occurred and that INT flags are pending to be read.
Indicate that a wake-up has occurred and that wake-up flags are pending to be read.
Indicate that a reset has occurred and that the flags that report the reset source are pending to be read.
The INT, WU or RST source is CAN interface. CAN local or CAN bus source.
The INT, WU or RST source is LIN2 or LIN1 interface
The INT, WU or RST source is I/O interfaces.
The INT, WU or RST source is from a SAFE condition
The INT, WU or RST source is from a Regulator event, or voltage monitoring event
The INT, WU or RST source is CAN interface. CAN local source.
The INT, WU or RST source is CAN interface. CAN bus source.
The INT, WU or RST source is LIN2 interface
The INT, WU or RST source is LIN1 interface
The INT, WU or RST source is I/O interface, flag from I/O sub adress Low (bit 7 = 0)
The INT, WU or RST source is I/O interface, flag from I/O sub adress High (bit 7 = 1)
The INT, WU or RST source is from a Regulator event, flag from REG register sub adress high (bit 7 = 1)
The INT, WU or RST source is from a Regulator event, flag from REG register sub adress low (bit 7 = 0)
WU
14
RST
13
CAN-G
12
LIN-G
11
I/O-G
10
SAFE-
G
9
VREG-
G
8
Description
One Byte
(MOSI bits 15-14, bits C1 C0 = 00 or 11).
Fix Status: when a device read operation is performed
CAN-
BUS
7
CAN-
LOC
6
LIN2
5
LIN1
4
SERIAL PERIPHERAL INTERFACE
FLAGS AND DEVICE STATUS
I/O-1
3
I/O-0
2
VREG-
1
1
33903/4/5
VREG-
0
0
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