MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 79

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DESCRIPTION
time level, device Identification and includes examples of SPI
commands (SPI command do not use parity functions). They
are obtained using the following commands.
Table 37. Device Flag, I/O Real Time and Device Identification
Analog Integrated Circuit Device Data
Freescale Semiconductor
MOSI
MISO
REG
CAN
The table below is a summary of the device flags, I/O real
This command is composed of the following:
bits 15 and 14:
• [1 1] for failure flags
Bits
INT
I/O
bits [15,
15-14
14]
11
11
11
00
11
00
11
00
8 Bits Device Fixed Status
MOSI bits 15-7
Address
Interrupt
Interrupt
(bits 15...8)
0_1111
1_0000
1_0000
1_0001
1_0001
1_0010
1_0010
[13-9]
REG
13-9
CAN
CAN
I/O
I/O
bit 8
8
1
1
1
1
1
1
1
Hexa SPI commands to get I/O Flags and I/O wake-up: MOSI 0x E3 00, and MOSI 0x E3 80
bit
7
0
1
0
1
1
0
1
1
0
1
1
example: MISO bit [7-0] = 1011 0010: MC33904, 5.0 V version, silicon pass 3.1
Hexa SPI commands to get Vreg Flags: MOSI 0x DF 00, and MOSI Ox DF 80
Hexa SPI commands to get CAN Flags: MOSI 0x E1 00, and MOSI 0x E1 80
V
HS3 short to
Hexa SPI commands to get INT Flags: MOSI 0x E5 00, and MOSI 0x E5 80
INT request
CAN Driver
V
DD
7
CAN_UF
wake-up
wake-up
AUX_LOW
I/O_1-3
3.3 V)
State
GND
bit 7
CAN
(5.0 V or
Hexa SPI commands to get CAN real time status: MOSI 0x 21 80
Hexa SPI commands to get device Identification: MOSI 0x 25 10
-
-
Hexa SPI commands to get I/O real time level: MOSI 0x 23 80
FLAGS AND DEVICE STATUS
CAN Receiver
I/O_0-2 wake-
HS2 short to
V
RST high
AUX_OVER-
CURRENT
CAN_F
device
State
I/O_3
GND
state
p/n 1
bit 6
up
6
-
-
-
SPI wake-up
DBG resistor
CAN Over-
SHUTDOWN
SPI parity
CAN WU
THERMAL
5V
to V
Next 7 MOSI bits (bits 6.0) should be “000_0000”
MISO bits [7-0], device response on MISO pin
device
CANL
en/dis
temp
error
p/n 0
bit 5
-CAN_
5
-
-
BAT
• bit 13 to 9 are the register address from which the flags is
• bit 8 = 1 (this is not parity bit function, as this is a read
remains latched until it is cleared by a read command
(provided the failure event has recovered).
• - [0 0] for I/O real time status, device identification and
to be read.
command).
When a failure event occurs, the respective flag is set and
CANL to V
CAN LIN driver receiver real time state.
Prewarning
SHUTDOWN
V
CSB low
>100 ms
THERMAL
RxD low
5V
V
DD
>2ms
I/O_2
V
FWU
DD
bit 4
state
-CAN_
id4
UV
DD_
4
-
temp
low
DD
V
INT service
V SUP2-UV
DD
CURRENT
Rxd high
5V
CANL to
Timeout
V
OVER-
GND
bit 3
DD
low RST
id3
-CAN_
3
-
UV
SERIAL PERIPHERAL INTERFACE
V SUP1-OV I/O_O thermal
Low Power
I/O_1 state
(<100 ms)
V
V
R
TxD dom
CANH to
V
RST low
>100 ms
DD
voltage
DD
ST_LOW
SENSE_
V
bit 2
LOW
id2
BAT
2
FLAGS AND DEVICE STATUS
Over-
-
OFF
Reset request
CANH to V
V
Bus Dom
AUX_OVER-
VOLTAGE
VOLTAGE
multiple
BATFAIL
UNDER-
Resets
V
V
clamp
bit 1
SUP_
SUP_
id1
1
-
DD
Leave Debug
W/D refresh
CAN Over-
I/O_0 state
mode 50%
W/D flash
Hardware
I
CANH to
DD-OC-LP
NORMAL
V
I
current
33903/4/5
DD-OC-
failure
MODE
MODE
bit 0
GND
DD
id0
0
-
-
ON
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