MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 31

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MCZ33905S5EK

Manufacturer Part Number
MCZ33905S5EK
Description
IC SYSTEM BASIS CHIP GEN2 32SOIC
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCZ33905S5EK

Applications
System Basis Chip
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Package / Case
32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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UNDER-VOLTAGE RESET AND RESET FUNCTION
(RST)
pull-up resistor. The low side driver has limited current
capability when asserted low, in order to tolerate a short to
5.0 V.The RESET pin voltage is monitored in order to detect
failure (e.g. RESET pin shorted to 5.0 V or GND).
condition at the VDD pin, as well as failure in watchdog
refresh operation. V
Low Power V
on (typ 4.65 V, R
This is selected by the SPI. When “R
Normal mode, an INT is asserted when VDD falls below
“R
will occur. This will allow the MCU to operate in a degraded
mode, for example, with 4.0 V V
I/O PINS (I/O-0: I/O-3)
for small load or to drive external transistors. When used as
output drivers, the I/Os are high side or low side type. They
can also be set to high-impedance. I/Os are controlled by the
SPI and at power on, the I/Os are set as inputs. They include
over load protection by temperature or excess of drop
voltage.
off, with extremely low extra consumption (except load).
Protection is disabled in low power mode.
switch, I/O-1, -2 and -3 and the wake inputs.
function.
VSENSE INPUT (VSENSE)
reverse battery protection diode), via a serial resistor and a
Analog Integrated Circuit Device Data
Freescale Semiconductor
ST-TH1-5
The RESET pin is an open drain structure with an internal
The RESET pin reports to the MCU under-voltage
Two V
I/O s are configurable input output pins. They can be used
In Low Power mode, state of the I/O can be turned on or
When cyclic sense is used, I/O-0 is the high side/low side
I/O-2 and I/O-3 pins share also the LIN Master pin
This pin can be connected to the battery line (before the
DD
“, then when V
under-voltage threshold are included. The upper
DD
ON mode.
ST-TH1-5
DD
under-voltage reset operate also in
) can lead to a Reset or an Interrupt.
DD
falls below “R
DD
.
ST-TH2-5
ST-TH2-5
“is selected, in
” a Reset
capacitor to gnd. It incorporates a threshold detector to sense
the battery voltage and provide a battery early warning. It also
includes a resistor divider to measure the V
the MUX-OUT pin.
MUX-OUTPUT (MUXOUT)
to the MCU A/D input. The voltage to be delivered to MUX-
OUT is selected via the SPI, from one of the following
functions: V
reference, die temperature sensor, V
shown in
MUX-OUT pin, to convert current into voltage. Device
includes an internal 2.0 k resistor selectable by the SPI.
automatically limited to V
numbers).
so the 5 V-CAN regulator must be ON in order to have:
SPI command that selects one of the analog input is ignored.
CAN turn ON and SPI to select MUX-OUT function. The
delay depends mainly upon the 5 V-CAN capacitor and load
on 5 V-CAN.
delay = C(5 V-CAN) x U (5.0 V) / I_lim 5 V-CAN.
(parameter 5 V
The MUX-OUT pin
Voltage divider or amplifier are inserted in the chain, as
For the V
Voltage range at MUX-OUT is from GND to VDD. It is
The MUX-OUT buffer is supplied from 5 V-CAN regulator,
1) MUX-OUT functionality and
2) SPI selection of the analog function.
If 5 V-CAN is OFF, MUX-OUT voltage is near gnd and the
Delay must be respected between SPI commands for 5 V-
The delay can be estimated using the following formula:
C = cap at 5 V-CAN regulator, U = 5.0 V,
I
_LIM
5 V-CAN = min current limit of 5 V-CAN regulator
Figure
SUP1
DD
current copy, a resistor must be added to the
-C ILIM
, V
19.
SENSE
).
(Figure
DD
, I/O-0, I/O-1, Internal 2.5 V
(max 3.3 V for 3.3 V part
FUNCTIONAL PIN DESCRIPTION
19) delivers an analog voltage
FUNCTIONAL DESCRIPTION
DD
current copy.
SENSE
voltage via
33903/4/5
31

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