MCZ33905S5EK Freescale Semiconductor, MCZ33905S5EK Datasheet - Page 38

• Manufacturer Part Number: MCZ33905S5EK
• Description: IC SYSTEM BASIS CHIP GEN2 32SOIC
• Manufacturer: Freescale Semiconductor

Specifications of MCZ33905S5EK

• Applications: System Basis Chip
• Interface: CAN, LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Package / Case: 32-SOIC (7.5mm Width) Exposed Pad, 32-eSOIC, 32-HSOIC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

send first. The latest SPI command needs to be done inside
the open window time frame, if window watchdog is selected.
DETAIL SPI OPERATION AND SPI COMMANDS
FOR ALL WATCHDOG TYPES.
do not make use of the parity functions.
advance and number of SPI commands) is selected using
register Init W/D, bits 1, 2 and 3. The watchdog period is
selected via TIM_A register. The watchdog period selection
can also be done in Normal mode or in Normal Request
mode.
Request mode to Normal mode is done via a single W/D
refresh command (SPI 0x 5A00).
depends upon the watchdog type selected in INIT mode.
They are detailed in the paragraph below:
Simple Watchdog:
within the watchdog period, if the timeout watchdog operation
is selected (INIT-watchdog register, bit 1 WD N/Win = 0).
period) if the Window Watchdog operation was selected
(INIT-watchdog register, bit 1 WD N/Win = 1).
Normal mode using the 0x5A00 command), Random
(RNDM) code must be read using SPI command 0x1B00.
Device returns on MISO second byte the RNDM code. The
full 16 bits MISO is called 0x XXRD. RD is the complement of
the RD byte.
Advance Watchdog, Refresh by 1 SPI Command:
command device returns on MISO a new Random Code. This
new random code must be inverted and send along with the
next refresh command and so on.
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FUNCTIONAL DEVICE OPERATION
WATCHDOG OPERATION
When multiple writes are used, the most significant bits are
All SPI commands and examples given in this document
In INIT mode, the watchdog type (window, timeout,
Transition from INIT mode to Normal mode or from Normal
While in Normal mode, the watchdog refresh command
Refresh command is 0x5A00. It can be send any time
It must be send in the open window (second half of the
Advance Watchdog:
The first time device enters in Normal mode (entry on
The refresh command is 0x5ARD. During each refresh
operation was selected.
Advance Watchdog, Refresh by two SPI Commands:
second is 0x5Aw2. Byte w1 contains the first four inverted
bits of the RD byte plus the last four bits equal to zero. Byte
w2 contains four bits equal to zero plus the last four inverted
bits of the RD byte.
MISO a new Random Code. This new random code must be
inverted and send along with the next two refresh commands
and so on.
the Window operation was selected.
Advance Watchdog, Refresh by four SPI Commands:
0x5Aw2, the third is 0x5Aw3, and the last is 0x5Aw4.
plus the last six bits equal to zero.
inverted bits of the RD byte, plus four bits equal to zero.
inverted bits of the RD byte, plus two bits equal to zero.
inverted bits of the RD byte.
a new Random Code. This new random code must be
inverted and send along with the next four refresh
commands.
the Window operation was selected.
PROPER RESPONSE TO INT
the INT in a timely manner: Access of the INT register is done
within two watchdog periods. Such feature must be enabled
by SPI via the INIT watchdog register bit 7
It must be done in the open window if the Window
The refresh command is splitted in two SPI commands.
The first partial refresh command is 0x5Aw1, and the
During this second refresh command device return on
The second command must be done in the open window if
The refresh command is splitted in four SPI commands.
The first partial refresh command is 0x5Aw1, the second is
Byte w1 contains the first two inverted bits of the RD byte,
Byte w2 contains two bits equal to zero, plus the next two
Byte w3 contains four bits equal to zero, plus the next two
Byte w4 contains six bits equal to zero, plus the next two
During this fourth refresh command device return on MISO
The fourth command must be done in the open window if
A device detect, that upon an INT, the software handles
Analog Integrated Circuit Device Data
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