ATtiny20 Atmel Corporation, ATtiny20 Datasheet - Page 109

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ATtiny20

Manufacturer Part Number
ATtiny20
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny20

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
12 MHz
Cpu
8-bit AVR
# Of Touch Channels
5
Hardware Qtouch Acquisition
Yes
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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14.1
14.2
14.2.1
8235B–AVR–04/11
Analog Comparator Multiplexed Input
Register Description
ACSRA – Analog Comparator Control and Status Register
When the Analog to Digital Converter (ADC) is configurated as single ended input channel, it is
possible to select any of the ADC[7:0] pins to replace the negative input to the Analog Compara-
tor. The ADC multiplexer is used to select this input. If the Analog Comparator Multiplexer
Enable bit (ACME in ADCSRB) is set, MUX bits in ADMUX select the input pin to replace the
negative input to the analog comparator.
Table 14-1.
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed, internal bandgap reference voltage replaces the positive input to the
Analog Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog
Comparator.
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of 1 - 2 clock cycles.
Bit
0x14
Read/Write
Initial Value
ACME
0
1
1
1
1
1
1
1
1
Analog Comparator Multiplexed Input
ACD
R/W
MUX[3:0]
0
7
XXXX
0000
0001
0010
0011
0100
0101
0110
0111
ACBG
R/W
0
6
Analog Comparator Negative Input
AIN1
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ACO
N/A
R
5
R/W
ACI
4
0
ACIE
R/W
3
0
ACIC
R/W
2
0
ACIS1
R/W
1
0
ACIS0
ATtiny20
R/W
0
0
ACSRA
109

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