ATtiny20 Atmel Corporation, ATtiny20 Datasheet - Page 25

• Manufacturer Part Number: ATtiny20
• Manufacturer: Atmel Corporation

Specifications of ATtiny20

• Flash (kbytes): 2 Kbytes
• Pin Count: 14
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 5
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 12
• Ext Interrupts: 12
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

7. Power Management and Sleep Modes
7.1
7.1.1
8235B–AVR–04/11
Sleep Modes
Idle Mode
The high performance and industry leading code efficiency makes the AVR microcontrollers an
ideal choise for low power applications. In addition, sleep modes enable the application to shut
down unused modules in the MCU, thereby saving power. The AVR provides various sleep
modes allowing the user to tailor the power consumption to the application’s requirements.
Figure 6-1 on page 18
The figure is helpful in selecting an appropriate sleep mode.
modes and their wake up sources.
Table 7-1.
Notes:
To enter any of the four sleep modes, the SE bits in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM[2:0] bits in the MCUCR register select which
sleep mode (Idle, ADC Noise Reduction, Standby or Power-down) will be activated by the
SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Note that if a level triggered interrupt is used for wake-up the changed level must be held for
some time to wake up the MCU (and for the MCU to enter the interrupt service routine). See
“External Interrupts” on page 39
When bits SM[2:0] are written to 000, the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing the analog comparator, ADC, timer/counters, watchdog, TWI, SPI
and the interrupt system to continue operating. This sleep mode basically halts clk
clk
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the timer overflow. If wake-up from the analog comparator interrupt is not required, the
Sleep Mode
Idle
ADC Noise Reduction
Standby
Power-down
NVM
, while allowing the other clocks to run.
1. For INT0, only level interrupt.
2. Only TWI address match interrupt.
Active Clock Domains and Wake-up Sources in Different Sleep Modes.
presents the different clock systems and their distribution in ATtiny20.
Table 7-2
Active Clock Domains
for details.
for a summary.
X
X
X
Oscillators
X
X
X
Table 7-1
X
X
X
X
(1)
(1)
(1)
shows the different sleep
Wake-up Sources
X
X
X
X
X
X
X
ATtiny20
X
(2)
(2)
(2)
X
X
CPU
and
X
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