ATtiny20 Atmel Corporation, ATtiny20 Datasheet - Page 17

• Manufacturer Part Number: ATtiny20
• Manufacturer: Atmel Corporation

Specifications of ATtiny20

• Flash (kbytes): 2 Kbytes
• Pin Count: 14
• Max. Operating Frequency: 12 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 5
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 12
• Ext Interrupts: 12
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

5.3
8235B–AVR–04/11
I/O Memory
The I/O space definition of the ATtiny20 is shown in
All ATtiny20 I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed
using the LD and ST instructions, enabling data transfer between the 16 general purpose work-
ing registers and the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can
be checked by using the SBIS and SBIC instructions. See document “AVR Instruction Set” and
section
commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that CBI and SBI
instructions will only operate on the specified bit, and can therefore be used on registers contain-
ing such status flags. The CBI and SBI instructions work on registers in the address range 0x00
to 0x1F, only.
The I/O and Peripherals Control Registers are explained in later sections.
“Instruction Set Summary” on page 210
for more details. When using the I/O specific
“Register Summary” on page
ATtiny20
208.
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