XC2S50 Xilinx, Inc., XC2S50 Datasheet - Page 16

• Manufacturer Part Number: XC2S50
• Description: Spartan-II 2.5V FPGA Family
• Manufacturer: Xilinx, Inc.

Bit Sequence
The bit sequence within each IOB is: In, Out, 3-State. The
input-only pins contribute only the In bit to the boundary
scan I/O data register, while the output-only pins contributes
all three bits.
DS001-2 (v2.2) September 3, 2003
Product Specification
TDI
IOB
IOB
IOB
IOB
IOB
IOB
IOB
R
IOB
Instruction Register
IOB
Register
Bypass
IOB
IOB
Figure 8: Spartan-II Family Boundary Scan Logic
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
M
U
X
TDO
www.xilinx.com
1-800-255-7778
IOB.Q
IOB.T
IOB.T
IOB.I
IOB.I
CAPTURE
SHIFT/
From a cavity-up view of the chip (as shown in the FPGA
Editor), starting in the upper right chip corner, the boundary
scan data-register bits are ordered as shown in
BSDL (Boundary Scan Description Language) files for
Spartan-II family devices are available on the Xilinx website,
in the File Download area.
DATAOUT
DATA IN
Spartan-II 2.5V FPGA Family: Functional Description
CLOCK DATA
REGISTER
1
0
1
0
1
0
1
0
1
0
D
D
D
D
D
Q
Q
Q
Q
Q
UPDATE
D
D
D
D
D
LE
LE
LE
LE
LE
sd
sd
sd
sd
sd
Q
Q
Q
Q
Q
0
1
1
0
1
0
0
1
1
0
EXTEST
Module 2 of 4
DS001_09_032300
Figure
9.
9