upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 112

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upd70f3017ay

Manufacturer Part Number
upd70f3017ay
Description
V850/sa1tm 32-/16-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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5.2.2 Restore
112
Execution is restored from non-maskable interrupt servicing by the RETI instruction.
Operation of RETI instruction
(1) Restores the values of the PC and PSW from FEPC and FEPSW, respectively, because the EP bit of PSW is
(2) Transfers control back to the address of the restored PC and PSW.
Caution When the PSW.EP bit and PSW.NP bit are changed by the LDSR instruction during non-
Remark
When the RETI instruction is executed, the CPU performs the following processing, and transfers control to the
address of the restored PC.
The following illustrates how the RETI instruction is processed.
0 and the NP bit of PSW is 1.
maskable interrupt servicing, in order to restore the PC and PSW correctly during recovery by
the RETI instruction, it is necessary to set PSW.EP back to 0 and PSW.NP back to 1 using the
LDSR instruction immediately before the RETI instruction.
The solid line shows the CPU processing flow.
1
CHAPTER 5 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Original processing restored
PC
PSW
RETI instruction
Figure 5-3. RETI Instruction Processing
PSW.EP
PSW.NP
0
0
EIPC
EIPSW
User’s Manual U12768EJ4V1UD
1
PC
PSW
FEPC
FEPSW

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