upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 20

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Figure No.
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7-37
8-1
8-2
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9-1
10-1
10-2
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10-4
10-5
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10-10
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10-16
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10-20
10-21
20
Data Hold Timing of Capture Register ...........................................................................................................185
Operation Timing of OVFn Flag .....................................................................................................................186
Block Diagram of TM2 to TM5 .......................................................................................................................190
Timing of Interval Timer Operation ................................................................................................................197
Timing of External Event Counter Operation (When Rising Edge Is Set) ......................................................200
Timing of Square Wave Output Operation .....................................................................................................201
Timing of PWM Output ..................................................................................................................................203
Timing of Operation Based on CRn0 Transition ............................................................................................204
Cascade Connection Mode with 16-Bit Resolution ........................................................................................206
Start Timing of Timer n ..................................................................................................................................207
Timing After Compare Register Changes During Timer Count Operation .....................................................207
Block Diagram of Watch Timer ......................................................................................................................208
Operation Timing of Watch Timer/Interval Timer ...........................................................................................212
Example of Generation of Watch Timer Interrupt Request (INTWT) (When Interrupt Period = 0.5 s) ...........212
Block Diagram of Watchdog Timer ................................................................................................................213
Block Diagram of 3-Wire Serial I/O ................................................................................................................222
Settings of CSIMn (Operation Stop Mode) ....................................................................................................225
Settings of CSIMn (3-Wire Serial I/O Mode) ..................................................................................................226
Timing of 3-Wire Serial I/O Mode...................................................................................................................227
Block Diagram of I
Serial Bus Configuration Example Using I
Pin Configuration Diagram.............................................................................................................................243
I
Start Condition ...............................................................................................................................................244
Address .........................................................................................................................................................245
Transfer Direction Specification .....................................................................................................................246
ACK Signal ....................................................................................................................................................247
Stop Condition ...............................................................................................................................................248
Wait Signal ....................................................................................................................................................249
Arbitration Timing Example............................................................................................................................271
Communication Reservation Timing ..............................................................................................................274
Timing for Acknowledging Communication Reservations ..............................................................................274
Communication Reservation Flow Chart........................................................................................................275
Master Operation Flow Chart.........................................................................................................................277
Slave Operation Flow Chart...........................................................................................................................278
Example of Master to Slave Communication (When 9-Clock Wait Is Selected for Both Master
and Slave) .....................................................................................................................................................280
2
C Bus’s Serial Data Transfer Timing............................................................................................................244
2
C......................................................................................................................................229
LIST OF FIGURES (3/6)
User’s Manual U12768EJ4V1UD
2
C Bus ..........................................................................................230
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