upd70f3017ay Renesas Electronics Corporation., upd70f3017ay Datasheet - Page 234

• Manufacturer Part Number: upd70f3017ay
• Description: V850/sa1tm 32-/16-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Caution In I
After reset: 00H
234
(1) IIC control register 0 (IICC0)
Note
Remark
IICC0
Condition for clearing (IICE = 0)
• Cleared by instruction
• When RESET is input
The standby mode following exit from communications remains in effect until the following communications entry conditions
are met.
• After a stop condition is detected, restart is in master mode.
• An address match or extension code reception occurs after the start condition.
Condition for clearing (LREL = 0)
• Automatically cleared after execution
• When RESET is input
LREL
IICC0 is used to enable/disable I
IICC0 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets IICC0 to 00H.
IICE
0
1
0
1
This flag’s signal is invalid when IICE = 0.
0.
•
•
STD:
ACKD: Bit 2 of IIC status register 0 (IICS0)
TRC:
COI:
EXC:
MSTS: Bit 7 of IIC status register 0 (IICS0)
IICE
Normal operation
This exits from the current communications operation and sets standby mode. This setting is automatically
cleared after being executed. Its uses include cases in which a locally irrelevant extension code has been
received.
The SCL and SDA lines are set to high impedance.
The following flags are cleared.
2
Set P10 (SDA) to output mode (PM10 = 0)
Set P12 (SCL) to output mode (PM12 = 0)
C bus mode, set the port 1 mode register (PM1) as follows. In addition, set each output latch to
7
Operation Stopped. IIC status register 0 (IICS0) preset. Internal operation stopped.
Operation enabled.
• STD • ACKD • TRC • COI • EXC • MSTS • STT • SPT
R/W
Bit 1 of IIC status register 0 (IICS0)
Bit 3 of IIC status register 0 (IICS0)
Bit 4 of IIC status register 0 (IICS0)
Bit 5 of IIC status register 0 (IICS0)
LREL
6
Note
WREL
CHAPTER 10
5
2
C operations, set wait timing, and set other I
I
2
User’s Manual U12768EJ4V1UD
Address: FFFFF340H
C Operation Enable/Disable Specification
SPIE
4
SERIAL INTERFACE FUNCTION
Exit from Communications
Condition for setting (LREL = 1)
• Set by instruction
WTIM
3
Condition for setting (IICE = 1)
• Set by instruction
ACKE
2
STT
1
2
C operations.
SPT
0
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